linux-kernel - RE: [PATCH] mfd: palmas: Add DVFS mux setting

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Message-ID: <643E69AA4436674C8F39DCC2C05F763862A12740FB@HQMAIL03.nvidia.com>
Date:	Fri, 26 Jul 2013 14:28:55 -0700
From:	Andrew Chew <AChew@...dia.com>
To:	Stephen Warren <swarren@...dotorg.org>
CC:	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"ian.campbell@...rix.com" <ian.campbell@...rix.com>,
	"rob@...dley.net" <rob@...dley.net>,
	"sameo@...ux.intel.com" <sameo@...ux.intel.com>,
	"lee.jones@...aro.org" <lee.jones@...aro.org>,
	"grant.likely@...aro.org" <grant.likely@...aro.org>,
	"ian@...mlogic.co.uk" <ian@...mlogic.co.uk>,
	"j-keerthy@...com" <j-keerthy@...com>,
	"gg@...mlogic.co.uk" <gg@...mlogic.co.uk>,
	Laxman Dewangan <ldewangan@...dia.com>,
	Rhyland Klein <rklein@...dia.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] mfd: palmas: Add DVFS mux setting

> On 07/26/2013 02:41 PM, Andrew Chew wrote:
> > There exists a PRIMARY_SECONDARY_PAD3 in the same register base as
> > PRIMARY_SECONDARY_PAD2, which controls the function of certain pins.
> > Add a property for this setting.
> 
> How does this interact with the pinctrl driver that Laxman just sent for
> Palmas?
> 
> https://lkml.org/lkml/2013/7/26/141
> [PATCH 0/2] pinctrl: palmas: add pincontrol driver

Thanks for pointing this out.  Given this:

+Optional properties:
+- ti,palams-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
+- ti,palams-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode.

I think his work already encompasses what my patch is supposed to do.

Abandoning this patch.
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