lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <643E69AA4436674C8F39DCC2C05F763862A1274137@HQMAIL03.nvidia.com>
Date:	Fri, 26 Jul 2013 15:12:31 -0700
From:	Andrew Chew <AChew@...dia.com>
To:	Stephen Warren <swarren@...dotorg.org>
CC:	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"ian.campbell@...rix.com" <ian.campbell@...rix.com>,
	"rob@...dley.net" <rob@...dley.net>,
	"sameo@...ux.intel.com" <sameo@...ux.intel.com>,
	"lee.jones@...aro.org" <lee.jones@...aro.org>,
	"grant.likely@...aro.org" <grant.likely@...aro.org>,
	"ian@...mlogic.co.uk" <ian@...mlogic.co.uk>,
	"j-keerthy@...com" <j-keerthy@...com>,
	"gg@...mlogic.co.uk" <gg@...mlogic.co.uk>,
	Laxman Dewangan <ldewangan@...dia.com>,
	Rhyland Klein <rklein@...dia.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] mfd: palmas: Add DVFS mux setting

> >>>> How does this interact with the pinctrl driver that Laxman just
> >>>> sent for Palmas?
> >>>>
> >>>> https://lkml.org/lkml/2013/7/26/141
> >>>> [PATCH 0/2] pinctrl: palmas: add pincontrol driver
> >>>
> >>> Thanks for pointing this out.  Given this:
> >>>
> >>> +Optional properties:
> >>> +- ti,palams-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1
> mode.
> >>> +- ti,palams-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2
> mode.
> >>>
> >>> I think his work already encompasses what my patch is supposed to do.
> >>>
> >>> Abandoning this patch.
> >>
> >> OK, that's simple!
> >>
> >> Are the existing ti,mux-pad1/ti,mux-pad2 properties already in the
> >> binding redundant with Laxman's pinctrl driver?
> >
> > In linux-next (where I based my work), yes, those two properties
> > already exist, and as far as I understand it, are redundant with Laxman's
> pinctrl driver.
> > I expect those properties will go away with Laxman's pinctrl driver.
> 
> Except those properties have been there for many kernel revisions and are
> an ABI and hence can't be removed, although I noticed that they got
> renamed recently, and of course we aren't technically being strict about this
> quite yet...
> 
> Re: the complete pinctrl driver: is anything outside the Palmas going to need
> to reprogram the Palmas pinctrl HW at run-time? Are the functions that can
> be routed to the pins just static configuration for PMIC features, or might
> other generic (non-Palmas) drivers use those pins for something? If not,
> perhaps it's be simpler to just add your ti,mux-pad3 property and be done.

I can imagine other projects wanting to do runtime muxing on those pins.
These pins can serve as GPIOs, or can be programmed for special functions.
For my particular scenario, I just need to statically set that particular mux
register (the power-on default value is not suitable for what we want to
do, namely to use the GPIO_6 pin as an actual GPIO pin).  If the existing
ti,mux-pad1 and ti,mux-pad2 properties are to stay, in the spirit of not changing
the existing ABI, then sure, we can make a case for adding the missing one
(ti,mux-pad3) for completeness.  In this case, if the palmas PMIC's pin
configuration can be statically set at start of day, one won't even need to
instantiate the palmas pinctrl driver at all, and with the addition of ti,mux-pad3,
the pin configuration control will actually be complete. 
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ