linux-kernel - Re: regulator: pfuze100: A few small questions

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Date:	Mon, 29 Jul 2013 17:28:10 +0800
From:	Robin Gong <b38343@...escale.com>
To:	Axel Lin <axel.lin@...ics.com>
CC:	Mark Brown <broonie@...nel.org>,
	Liam Girdwood <lgirdwood@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: regulator: pfuze100: A few small questions

On Mon, Jul 29, 2013 at 04:20:03PM +0800, Axel Lin wrote:
> 2013/7/29 Axel Lin <axel.lin@...ics.com>:
> > Hi Robin,
> > 2 questions about the code in pfuze100 driver:
> >
> > 1)
> > Both PFUZE100_REVID and PFUZE100_FABID are defined as 0x3.
> > So I'm wondering if it's a typo in one of the register address?
> > If they are actually the same register, we don't need to read the same
> > register twice in pfuze_identify().
Yes, It's a typo, I will correct it.
> >
> > 2)
> > What is the the purpose of stby_reg and stby_mask?
> > Seems current code does not use it?
They are only kept place. These reg bits are used to set standby
voltage, I will finish it in the future.
> 
> 
> One more question:
> 
> Current code adjust min_uV and uV_step when SW2~SW4 high bit is set.
> I'm wondering if n_voltages is correct or not in this case because
> the n_voltages is calculated by original equation (max-min/step + 1).
> What is the max_uV when SW2~SW4 high bit is set?
> 
If high bit set(bit6, bit0~5:vsel), min_uV/step will change from 0.4V/25mV to
0.8V/50mV,but the n_voltages will kept the same.
For example,SW2 will vary from 0.4V to 1.975V(0x0~0x3f),if bit6 set 0(high bit)
SW2 will vary from 0.8V to 3.3V(0x40~0x72,0x72~0x7f:reversed).
Please ignore bit7 or consider it as 0.
> Regards,
> Axel
> 

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