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Message-ID: <51F9550F.3080503@cogentembedded.com>
Date: Wed, 31 Jul 2013 22:18:55 +0400
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: Tuomas Tynkkynen <ttynkkynen@...dia.com>
CC: swarren@...dotorg.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
Mikko Perttunen <mperttunen@...dia.com>
Subject: Re: [PATCH 2/2] ARM: dts: USB for Tegra114 Dalmore
Hello.
On 07/31/2013 09:42 PM, Tuomas Tynkkynen wrote:
> From: Mikko Perttunen <mperttunen@...dia.com>
> Device tree entries for the three EHCI controllers on Tegra114.
> Enables the the third controller (USB host) on Dalmore.
I would have done the board patch separately from the SoC one.
> Signed-off-by: Mikko Perttunen <mperttunen@...dia.com>
[...]
> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> index abf6c40..2905145 100644
> --- a/arch/arm/boot/dts/tegra114.dtsi
> +++ b/arch/arm/boot/dts/tegra114.dtsi
> @@ -430,6 +430,68 @@
> status = "disable";
> };
>
> + usb@...00000 {
> + compatible = "nvidia,tegra30-ehci", "usb-ehci";
> + reg = <0x7d000000 0x4000>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + phy_type = "utmi";
> + clocks = <&tegra_car TEGRA114_CLK_USBD>;
> + nvidia,phy = <&phy1>;
> + status = "disabled";
> + };
> +
> + phy1: usb-phy@...00000 {
At the same address as the previous node?
> + compatible = "nvidia,tegra30-usb-phy";
> + reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
Hm, there must be some mistake: two similar register ranges.
> + usb@...08000 {
> + compatible = "nvidia,tegra30-ehci", "usb-ehci";
> + reg = <0x7d008000 0x4000>;
> + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> + phy_type = "utmi";
> + clocks = <&tegra_car TEGRA114_CLK_USB3>;
> + nvidia,phy = <&phy3>;
> + status = "disabled";
> + };
> +
> + phy3: usb-phy@...08000 {
Again at the same address as previous node?
> + compatible = "nvidia,tegra30-usb-phy";
> + reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
Second range conflicts with previous nodes.
WBR, Sergei
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