linux-kernel - [PATCH] arm: zynq: dt: Set correct L2 ram latencies

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Message-Id: <1375313099-8402-1-git-send-email-soren.brinkmann@xilinx.com>
Date:	Wed, 31 Jul 2013 16:24:59 -0700
From:	Soren Brinkmann <soren.brinkmann@...inx.com>
To:	Rob Herring <rob.herring@...xeda.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Stephen Warren <swarren@...dotorg.org>,
	Ian Campbell <ian.campbell@...rix.com>,
	Russell King <linux@....linux.org.uk>,
	Michal Simek <michal.simek@...inx.com>
Cc:	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	Soren Brinkmann <soren.brinkmann@...inx.com>
Subject: [PATCH] arm: zynq: dt: Set correct L2 ram latencies

Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
---
 arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 6f54a64..e32b92b 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -41,8 +41,8 @@
 		L2: cache-controller {
 			compatible = "arm,pl310-cache";
 			reg = <0xF8F02000 0x1000>;
-			arm,data-latency = <2 3 2>;
-			arm,tag-latency = <2 3 2>;
+			arm,data-latency = <3 2 2>;
+			arm,tag-latency = <2 2 2>;
 			cache-unified;
 			cache-level = <2>;
 		};
-- 
1.8.3.4

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