linux-kernel - Re: [PATCH] Documentation: Add device tree binding file for MOXA ART SoCs interrupt controller

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Message-ID: <20130802093559.GB2884@e106331-lin.cambridge.arm.com>
Date:	Fri, 2 Aug 2013 10:35:59 +0100
From:	Mark Rutland <mark.rutland@....com>
To:	Jonas Jensen <jonas.jensen@...il.com>
Cc:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"arm@...nel.org" <arm@...nel.org>
Subject: Re: [PATCH] Documentation: Add device tree binding file for MOXA
 ART SoCs interrupt controller

On Thu, Jul 18, 2013 at 09:50:26AM +0100, Jonas Jensen wrote:
> Add binding document for MOXA ART SoCs interrupt controller.
> 
> Signed-off-by: Jonas Jensen <jonas.jensen@...il.com>
> ---
> 
> Notes:
>     The MOXA ART irqchip driver was added without accompanying devicetree document.
>     ( in next-20130716   drivers/irqchip/irq-moxart.c )

Aaargh. That should not have happened >:(

>     
>     Applies to next-20130716
> 
>  .../interrupt-controller/moxa,moxart-ic.txt        | 28 ++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt
> new file mode 100644
> index 0000000..58f1fe1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt
> @@ -0,0 +1,28 @@
> +* MOXA ART Interrupt Controller
> +
> +MOXA ART Interrupt Controller (moxart-ic) is used on MOXA ART SoCs
> +and supports 32 non-configurable number of interrupts
> +
> +Main node required properties:
> +
> +- compatible : "moxa,moxart-ic"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> +  interrupt source. The type shall be a <u32> and the value shall be 2.
> +
> +  The first cell contains the interrupt number in the range [0-31].
> +  The second cell contains the interrupt type
> +
> +- reg: physical base address and size of the intc registers map.
> +- interrupt-mask: Specifies if the interrupt is edge or level-triggered
> +  each bit represent an interrupt 0-31 where 1 signify edge

For the GIC, this gets descrbied in the interrupt sepcifier rather than
on the interrupt controller's root node. Is there a reason to do this
differently here?

Thanks,
Mark.

> +
> +Example:
> +
> +	intc: interrupt-controller@...00000 {
> +		compatible = "moxa,moxart-ic";
> +		reg = <0x98800000 0x38>;
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		interrupt-mask = <0x00080000>;
> +	};
> -- 
> 1.8.2.1
> 
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@...ts.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
> 
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