lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Thu, 08 Aug 2013 14:10:02 -0600 From: Alex Williamson <alex.williamson@...hat.com> To: bhelgaas@...gle.com, linux-pci@...r.kernel.org Cc: alexander.h.duyck@...el.com, ddutile@...hat.com, indou.takao@...fujitsu.com, linux-kernel@...r.kernel.org Subject: [PATCH v5 7/9] pci: Wake-up devices before save for reset Devices come out of reset in D0. Restoring a device to a different post-reset state takes more smarts than our simple config space restore, which can leave devices in an inconsistent state. For example, if a device is reset in D3, but the restore doesn't successfully return the device to D3, then the actual state of the device and dev->current_state are contradictory. Put everything in D0 going into the reset, then we don't need to do anything special on the way out. Signed-off-by: Alex Williamson <alex.williamson@...hat.com> --- drivers/pci/pci.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 1dba7dd..b204206 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3332,6 +3332,13 @@ static void pci_dev_unlock(struct pci_dev *dev) static void pci_dev_save_and_disable(struct pci_dev *dev) { + /* + * Wake-up device prior to save. PM registers default to D0 after + * reset and a simple register restore doesn't reliably return + * to a non-D0 state anyway. + */ + pci_set_power_state(dev, PCI_D0); + pci_save_state(dev); /* * Disable the device by clearing the Command register, except for -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists