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Message-ID: <20130815134454.GF27616@pd.tnic>
Date: Thu, 15 Aug 2013 15:44:54 +0200
From: Borislav Petkov <bp@...en8.de>
To: Mauro Carvalho Chehab <m.chehab@...sung.com>
Cc: "Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>,
tony.luck@...el.com, bhelgaas@...gle.com, rostedt@...dmis.org,
rjw@...k.pl, lance.ortiz@...com, linux-pci@...r.kernel.org,
linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] mce: acpi/apei: trace: Enable ghes memory error
trace event
On Thu, Aug 15, 2013 at 10:26:07AM -0300, Mauro Carvalho Chehab wrote:
> I mean that the edac core needs to know that, on a given system, the
> BIOS is accessing the hardware registers and sending the data via
> ghes_edac.
Right, that's the firmware-first thing which Naveen did - see
mce_disable_bank.
> No. As we want that fatal errors to also be properly reported, the
> kernel will still need to know the memory layout.
Read what I said: if you have the silkscreen label you don't need the
memory layout - you *already* *know* which DIMM is affected.
Also, fatal errors are a whole different beast where we run in NMI
context or we even don't get to run the #MC handler on some systems.
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
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