linux-kernel - Re: [PATCH] i915: Update VGA arbiter support for newer devices

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Message-ID: <1376607255.13642.155.camel@ul30vt.home>
Date:	Thu, 15 Aug 2013 16:54:15 -0600
From:	Alex Williamson <alex.williamson@...hat.com>
To:	Dave Airlie <airlied@...il.com>
Cc:	"intel-gfx@...ts.freedesktop.org" <intel-gfx@...ts.freedesktop.org>,
	Dave Airlie <airlied@...hat.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Ville Syrjälä 
	<ville.syrjala@...ux.intel.com>
Subject: Re: [PATCH] i915: Update VGA arbiter support for newer devices

On Fri, 2013-08-16 at 08:49 +1000, Dave Airlie wrote:
> On Fri, Aug 16, 2013 at 8:43 AM, Alex Williamson
> <alex.williamson@...hat.com> wrote:
> > This is intended to add VGA arbiter support for Intel HD graphics on
> > Core processors.  The old GMCH registers no longer exist, so even
> > though it appears that i915 participates in VGA arbitration, it doesn't
> > work.  On Intel HD graphics we already attempt to disable VGA regions
> > of the device.  This makes registering as a VGA client unnecessary since
> > we don't intend to operate differently depending on how many VGA devices
> > are present.  We can disable VGA memory regions by clearing a memory
> > enable bit in the VGA MSR.  That only leaves VGA IO, which we update
> > the VGA arbiter to know that we don't participate in VGA memory
> > arbitration.  We also add a hook on unload to re-enable memory and
> > reinstate VGA memory arbitration.
> 
> I would think there is still a VGA disable bit on the Intel device
> somewhere, we'd just need
> Intel to look in the docs and find it. A bit that can nuke both i/o
> and cmd regs.

The only bit available is in the GGC and is a keyed/locked register that
not only disables VGA memory and I/O, but also modifies the class code
of the device.  Early Core processors didn't lock this, but it's
untouchable in newer ones AFAICT.  Thanks,

Alex

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