linux-kernel - Re: [RFC v1 4/5] ARM: mvebu: add Armada 1500 and Sony NSZ-GS7 device tree files

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <201308172128.35245.arnd@arndb.de>
Date:	Sat, 17 Aug 2013 21:28:34 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc:	Rob Herring <rob.herring@...xeda.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Stephen Warren <swarren@...dotorg.org>,
	Ian Campbell <ian.campbell@...rix.com>,
	Russell King <linux@....linux.org.uk>,
	Jason Cooper <jason@...edaemon.net>,
	Andrew Lunn <andrew@...n.ch>,
	Gregory Clement <gregory.clement@...e-electrons.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: Re: [RFC v1 4/5] ARM: mvebu: add Armada 1500 and Sony NSZ-GS7 device tree files

On Friday 16 August 2013, Sebastian Hesselbarth wrote:
> +               cpu@0 {
> +                       compatible = "marvell,sheeva-v7";
> +                       device_type = "cpu";
> +                       next-level-cache = <&l2>;
> +                       reg = <0>;
> +               };
...
> +               l2: l2-cache-controller@...0000 {
> +                       compatible = "marvell,aurora-outer-cache";
> +                       reg = <0x1ac0000 0x1000>;
> +                       cache-level = <2>;
> +               };
> +
> +               gic: interrupt-controller@...0000 {
> +                       compatible = "arm,cortex-a9-gic";
> +                       reg = <0x1ad1000 0x1000
> +                              0x1ad0100 0x0100>;
> +                       interrupt-controller;
> +                       #interrupt-cells = <3>;
> +               };
> +
> +               local-timer@...0600 {
> +                       compatible = "arm,cortex-a9-twd-timer";
> +                       reg = <0x1ad0600 0x20>;
> +                       interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpu0clk>;
> +               };

This seems like a strange combination. I would have expected either PJ4+Aurora+apbtimer
or A9+pl310+localtimer, based on what I found in the chromecast kernel source.
Do you have more information here about what is used on the two variants?

	Arnd
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/