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Date:	Mon, 19 Aug 2013 13:23:34 +0200
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Emilio Lopez <emilio@...pez.com.ar>, kevin.z.m.zh@...il.com,
	sunny@...winnertech.com, shuge@...winnertech.com,
	linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCHv3 4/9] pinctrl: sunxi: Add Allwinner A20 pins set

On Mon, Aug 12, 2013 at 10:33:19AM +0200, Maxime Ripard wrote:
> Hi Linus,
> 
> On Sun, Aug 04, 2013 at 11:58:45AM +0200, Maxime Ripard wrote:
> > The Allwinner A20 is pin-compatible with the older A10, so the two pin
> > set are quite similar. However, since the A20 has new features, we can't
> > just use the A10 pin set as is, and we need to define our own for the
> > A20.
> 
> I'd like this to get merged in 3.12, do you have any comments on this
> patch?
> 
> It's mostly just another round of pin sets additions for yet another
> SoC, like we already had a few times.
> 
> Hopefully, it will be the end of it, unless if Allwinner release a new
> SoC.
> 
> The only missing feature now is the gpio irq support for the A31 that
> had a slightly different interrupts handling. Anyway, this support will
> likely be in 3.13.

Ping again :)

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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