linux-kernel - Re: [PATCH v4 2/3] usb: phy: Add Qualcomm SS-USB and HS-USB drivers for DWC3 core

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Date:	Tue, 20 Aug 2013 09:33:19 -0500
From:	Felipe Balbi <balbi@...com>
To:	"Ivan T. Ivanov" <iivanov@...sol.com>
CC:	<balbi@...com>, <rob.herring@...xeda.com>, <pawel.moll@....com>,
	<mark.rutland@....com>, <swarren@...dotorg.org>,
	<ian.campbell@...rix.com>, <rob@...dley.net>,
	<gregkh@...uxfoundation.org>, <grant.likely@...aro.org>,
	<idos@...eaurora.org>, <mgautam@...eaurora.org>,
	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <linux-usb@...r.kernel.org>,
	<linux-omap@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
	Paul Zimmerman <paul.zimmerman@...opsys.com>
Subject: Re: [PATCH v4 2/3] usb: phy: Add Qualcomm SS-USB and HS-USB drivers
 for DWC3 core

On Tue, Aug 20, 2013 at 05:09:11PM +0300, Ivan T. Ivanov wrote:
> Hi,
> 
> On Tue, 2013-08-20 at 08:37 -0500, Felipe Balbi wrote: 
> > Hi,
> > 
> > On Tue, Aug 20, 2013 at 04:32:23PM +0300, Ivan T. Ivanov wrote:
> > > > On Tue, Aug 20, 2013 at 12:56:04PM +0300, Ivan T. Ivanov wrote:
> > > > > From: "Ivan T. Ivanov" <iivanov@...sol.com>
> > > > > 
> > > > > These drivers handles control and configuration of the HS
> > > > > and SS USB PHY transceivers. They are part of the driver
> > > > > which manage Synopsys DesignWare USB3 controller stack
> > > > > inside Qualcomm SoC's.
> > > > > 
> > > > > Signed-off-by: Ivan T. Ivanov <iivanov@...sol.com>
> > > > > ---
> > > > >  drivers/usb/phy/Kconfig           |   11 ++
> > > > >  drivers/usb/phy/Makefile          |    2 +
> > > > >  drivers/usb/phy/phy-msm-dwc3-hs.c |  327 ++++++++++++++++++++++++++++++++
> > > > >  drivers/usb/phy/phy-msm-dwc3-ss.c |  374 +++++++++++++++++++++++++++++++++++++
> > > > 
> > > > please rename these PHY drivers, they have nothing to do with DWC3. PHYs
> > > > don't care about the USB controller.
> > > 
> > > I think they are SNPS DesignWare PHY's, additionally
> > > wrapped with Qualcomm logic. I could substitute "dwc3"
> > > with just "dw", which will be more correct.
> > 
> > alright, thank you. Let's add Paul to the loop since he might have very
> > good insight in the synopsys PHYs.
> > 
> > mental note: if any other platform shows up with Synopsys PHY, ask them
> > to use this driver instead :-)
> 
> I really doubt that this will bi possible. Control of the PHY's is
> not directly trough ULPI, UTMI or PIPE3 interfaces, but trough
> QSCRATCH registers, which of course is highly Qualcomm specific.

isn't it a memory mapped IP ? doesn't synopsys provide their own set of
registers ?

-- 
balbi

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