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Date:	Wed, 21 Aug 2013 15:21:21 +0200
From:	Lars Poeschel <poeschel@...onage.de>
To:	Stephen Warren <swarren@...dotorg.org>
Cc:	Tomasz Figa <tomasz.figa@...il.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Lars Poeschel <larsi@....tu-dresden.de>,
	Grant Likely <grant.likely@...aro.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Javier Martinez Canillas <javier.martinez@...labora.co.uk>,
	Enric Balletbo i Serra <eballetbo@...il.com>,
	"Jean-Christophe PLAGNIOL-VILLARD" <plagnioj@...osoft.com>,
	Santosh Shilimkar <santosh.shilimkar@...com>,
	Kevin Hilman <khilman@...aro.org>,
	Balaji T K <balajitk@...com>,
	Tony Lindgren <tony@...mide.com>,
	Jon Hunter <jgchunter@...il.com>, mark.rutland@....com,
	ian.campbell@...rix.com, galak@...eaurora.org, pawel.moll@....com
Subject: Re: [PATCH v2] RFC: interrupt consistency check for OF GPIO IRQs

On Monday 19 August 2013 at 21:35:22, Stephen Warren wrote:
> On 08/17/2013 03:59 AM, Tomasz Figa wrote:
> > [Ccing DT maintainers, as they may have some ideas as well]
> > 
> > On Saturday 17 of August 2013 02:16:11 Linus Walleij wrote:
> >> On Thu, Aug 15, 2013 at 11:53 AM, Tomasz Figa <tomasz.figa@...il.com>  
wrote:
> ...
> 
> >>> This is the biggest problem of this patch. It assumes that there is
> >>> only a single and shared GPIO/interrupt specification scheme, which
> >>> might not be true.
> >>> 
> >>> First of all, almost all interrupt bindings have an extra,
> >>> semi-generic
> >>> flags field as last cell in the specifier. Now there can be more
> >>> than one>
> >>> 
> >>> cell used to index GPIOs and interrupts, for example:
> >>>         interrupts = <1 3 8>
> >>> 
> >>> which could mean: bank 1, pin 3, low level triggered.
> >> 
> >> You are right, but:
> >> Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> >> Specifies how to handle the one-celled and two-celled versions.
> >> 
> >> And nothing else is specified. So it's not overly complex.
> > 
> > The documentation states that:
> > 	It is the responsibility of the interrupt controller's binding to
> > 	define the length and format of the interrupt specifier.
> > 
> > Then two _example_ formats follow, preceded by following statement:
> > 	The following two variants are commonly used:
> > I already know a variant which uses three (Exynos combiner) and four
> > (S3C24xx interrupt controller) cells. They are not pin controllers,
> > but you can't stop anyone from adopting similar or even more complex
> > specifiers formats for their hardware, especially when it matches
> > more closely the interrupt/pin layout used in their hardware.
> 
> Yes, the binding doc interrupts.txt mentioned above does not specify
> *the* one-/two-cell format, but *a* common/possible one- and two-cell
> format. There's no strict reason that all interrupt controllers have to
> use those exact formats. The only way to parse interrupt specifiers is
> to ask the driver for the the interrupt controller code to parse the
> property.

I agree with you. I also understand the interrupts.txt binding doc as it 
lists only a common/possible cell format, but it's purpose is not to 
restrict it to this.

I send an updated patch, that uses the drivers xlate function to parse the 
interrupt property in a few minutes.

Thanks for clarifying this,
Lars
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