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Message-id: <1377517114-20222-4-git-send-email-m.krawczuk@partner.samsung.com>
Date: Mon, 26 Aug 2013 13:38:32 +0200
From: Mateusz Krawczuk <m.krawczuk@...tner.samsung.com>
To: kgene.kim@...sung.com
Cc: kyungmin.park@...sung.com, t.figa@...sung.com,
tomasz.figa@...il.com, rob.herring@...xeda.com, pawel.moll@....com,
mark.rutland@....com, swarren@...dotorg.org,
ian.campbell@...rix.com, rob@...dley.net, mturquette@...aro.org,
thomas.abraham@...aro.org, t.stanislaws@...sung.com,
m.chehab@...sung.com, s.nawrocki@...sung.com,
m.szyprowski@...ung.com, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux@....linux.org.uk,
devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
Mateusz Krawczuk <m.krawczuk@...tner.samsung.com>
Subject: [PATCH RFC 3/5] ARM: samsung: add clock setup for FIMC and FIMD
This patch adds code that sets correct parents and rates for clocks
used by FIMC and FIMD on Goni board.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@...tner.samsung.com>
---
arch/arm/mach-s5pv210/mach-goni.c | 48 +++++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index e5cd9fb..309b5ad 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -55,6 +55,7 @@
#include <media/s5p_fimc.h>
#include <media/noon010pc30.h>
+#include <linux/clk.h>
#include "common.h"
/* Following are default values for UCON, ULCON and UFCON UART registers */
@@ -195,6 +196,49 @@ static struct platform_device goni_spi_gpio = {
},
};
+static void set_fimd_clock(void)
+{
+ struct clk *lcd_clk, *parent_clk;
+
+ lcd_clk = clk_get(NULL, "sclk_fimd");
+ parent_clk = clk_get(NULL, "mout_mpll");
+ clk_set_parent(lcd_clk, parent_clk);
+ clk_set_rate(lcd_clk, clk_get_rate(parent_clk)/3);
+
+ clk_put(parent_clk);
+ clk_put(lcd_clk);
+}
+
+static void set_fimc_clock(void)
+{
+ struct clk *cam0_clk, *cam1_clk, *fimc2_clk, *fimc1_clk,
+ *fimc0_clk, *parent_clk, *vpll_clk, *csis_clk;
+
+ parent_clk = clk_get(NULL, "mout_mpll");
+ vpll_clk = clk_get(NULL, "mout_vpll");
+ cam0_clk = clk_get(NULL, "mout_cam0");
+ cam1_clk = clk_get(NULL, "mout_cam1");
+ fimc2_clk = clk_get(NULL, "mout_fimc2");
+ fimc1_clk = clk_get(NULL, "mout_fimc1");
+ fimc0_clk = clk_get(NULL, "mout_fimc0");
+ csis_clk = clk_get(NULL, "mout_csis");
+
+ clk_set_parent(cam0_clk, vpll_clk);
+ clk_set_parent(cam1_clk, vpll_clk);
+ clk_set_parent(fimc2_clk, parent_clk);
+ clk_set_parent(fimc1_clk, parent_clk);
+ clk_set_parent(fimc0_clk, parent_clk);
+ clk_set_parent(csis_clk, parent_clk);
+
+ clk_put(parent_clk);
+ clk_put(vpll_clk);
+ clk_put(cam0_clk);
+ clk_put(cam1_clk);
+ clk_put(fimc2_clk);
+ clk_put(fimc1_clk);
+ clk_put(fimc0_clk);
+}
+
/* KEYPAD */
static uint32_t keymap[] __initdata = {
/* KEY(row, col, keycode) */
@@ -931,6 +975,10 @@ static void __init goni_machine_init(void)
s3c_i2c2_set_platdata(&i2c2_data);
i2c_register_board_info(2, i2c2_devs, ARRAY_SIZE(i2c2_devs));
+ /* FIMD AND FIMC set clock config */
+ set_fimd_clock();
+ set_fimc_clock();
+
/* PMIC */
goni_pmic_init();
i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
--
1.8.1.2
--
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