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Date:	Tue, 27 Aug 2013 16:09:15 +0400
From:	Alexander Fyodorov <halcy@...dex.ru>
To:	Waiman Long <waiman.long@...com>
Cc:	linux-kernel <linux-kernel@...r.kernel.org>,
	"Chandramouleeswaran, Aswin" <aswin@...com>,
	"Norton, Scott J" <scott.norton@...com>,
	Peter Zijlstra <peterz@...radead.org>,
	Steven Rostedt <rostedt@...dmis.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>
Subject: Re: [PATCH RFC v2 1/2] qspinlock: Introducing a 4-byte queue spinlock implementation

> I also thought that the x86 spinlock unlock path was an atomic add. It
> just comes to my realization recently that this is not the case. The
> UNLOCK_LOCK_PREFIX will be mapped to "" except for some old 32-bit x86
> processors.

Hmm, I didn't know that. Looking through Google found these rules for x86 memory ordering:
  * Loads are not reordered with other loads.
  * Stores are not reordered with other stores.
  * Stores are not reordered with older loads.
So x86 memory model is rather strict and memory barrier is really not needed in the unlock path - xadd is a store and thus behaves like a memory barrier, and since only lock's owner modifies "ticket.head" the "add" instruction need not be atomic.

But this is true only for x86, other architectures have more relaxed memory ordering. Maybe we should allow arch code to redefine queue_spin_unlock()? And define a version without smp_mb() for x86?
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