linux-kernel - Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

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Date:	Thu, 29 Aug 2013 10:19:32 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Stephen Warren <swarren@...dotorg.org>
Cc:	Sonic Zhang <sonic.adi@...il.com>,
	Grant Likely <grant.likely@...aro.org>,
	Steven Miao <realmz6@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	adi-buildroot-devel@...ts.sourceforge.net,
	Sonic Zhang <sonic.zhang@...log.com>
Subject: Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO
 controller on bf54x and bf60x.

On Thu, Aug 22, 2013 at 10:48 PM, Stephen Warren <swarren@...dotorg.org> wrote:
> On 08/22/2013 01:07 AM, Sonic Zhang wrote:
>>
>> There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
>> pinmux_enable_setting() in current pinctrl framework assumes the
>> function mux setting of one peripheral pin group is configured in one
>> pinctrl device. But, the function mux setting of one blackfin
>> peripheral may be done among different GPIO HW blocks. So, I have to
>> separate the pinctrl driver from the GPIO block driver add the ranges
>> of all GPIO blocks into one pinctrl device for Blackfin.
>
> I don't think you need separate device; the pin control mapping table
> entries for a particular state simply needs to include entries for
> multiple pin controllers.

So splitting each block into a separate pin control device is definately
one way to skin the cat.

The ux500 would then have 9 pin controller instances (after a
big fat refactoring, but whatever) instead of 9 GPIO instances
and one pinctrl instance referencing them. Also this solves
the problem of registering GPIO ranges from the wrong end
of the pin controller.

Hm, I should try this and see where it goes... What do you
think about this Sonic?

Yours,
Linus Walleij
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