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Message-ID: <1378367730-25996-2-git-send-email-wangyijing@huawei.com>
Date: Thu, 5 Sep 2013 15:55:26 +0800
From: Yijing Wang <wangyijing@...wei.com>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"James E.J. Bottomley" <JBottomley@...allels.com>
CC: Gavin Shan <shangw@...ux.vnet.ibm.com>,
<linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
Yijing Wang <wangyijing@...wei.com>,
Hanjun Guo <guohanjun@...wei.com>,
Jiang Liu <jiang.liu@...wei.com>,
Naresh Kumar Inna <naresh@...lsio.com>,
"David S. Miller" <davem@...emloft.net>,
Jesper Juhl <jj@...osbits.net>, <linux-scsi@...r.kernel.org>
Subject: [PATCH v2 2/6] scsi/csiostor: use pcie_capability_xxx to simplify code
v1->v2: add #define for Completion Timeout Value, and use
pcie_capability_clear_and_set_word() instead suggested by Bjorn.
Pcie_capability_xxx() interfaces were introduced to
simplify code to access PCIe Cap config space. And
because PCI core saves the PCIe Cap offset in
set_pcie_port_type() when device is enumerated.
So we can use pci_is_pcie() instead.
Signed-off-by: Yijing Wang <wangyijing@...wei.com>
Cc: Jiang Liu <jiang.liu@...wei.com>
Cc: "James E.J. Bottomley" <JBottomley@...allels.com>
Cc: Naresh Kumar Inna <naresh@...lsio.com>
Cc: "David S. Miller" <davem@...emloft.net>
Cc: Jesper Juhl <jj@...osbits.net>
Cc: linux-scsi@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
---
drivers/scsi/csiostor/csio_hw.c | 14 +++-----------
include/uapi/linux/pci_regs.h | 1 +
2 files changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/scsi/csiostor/csio_hw.c b/drivers/scsi/csiostor/csio_hw.c
index 0eb35b9..07f493a 100644
--- a/drivers/scsi/csiostor/csio_hw.c
+++ b/drivers/scsi/csiostor/csio_hw.c
@@ -855,17 +855,9 @@ csio_hw_get_flash_params(struct csio_hw *hw)
static void
csio_set_pcie_completion_timeout(struct csio_hw *hw, u8 range)
{
- uint16_t val;
- int pcie_cap;
-
- if (!csio_pci_capability(hw->pdev, PCI_CAP_ID_EXP, &pcie_cap)) {
- pci_read_config_word(hw->pdev,
- pcie_cap + PCI_EXP_DEVCTL2, &val);
- val &= 0xfff0;
- val |= range ;
- pci_write_config_word(hw->pdev,
- pcie_cap + PCI_EXP_DEVCTL2, val);
- }
+ if (pci_is_pcie(hw->pdev))
+ pcie_capability_clear_and_set_word(hw->pdev, PCI_EXP_DEVCTL2,
+ PCI_EXP_DEVCTL2_COMP_TIME, range);
}
/*****************************************************************************/
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index baa7852..cd74182 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -558,6 +558,7 @@
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
+#define PCI_EXP_DEVCTL2_COMP_TIME 0x0f /* Completion Timeout Value */
#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
#define PCI_EXP_DEVCTL2_IDO_REQ_EN 0x0100 /* Allow IDO for requests */
#define PCI_EXP_DEVCTL2_IDO_CMP_EN 0x0200 /* Allow IDO for completions */
--
1.7.1
--
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