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Message-ID: <5231817F.8000901@ahsoftware.de>
Date: Thu, 12 Sep 2013 10:55:27 +0200
From: Alexander Holler <holler@...oftware.de>
To: Javier Martinez Canillas <javier.martinez@...labora.co.uk>
CC: Linus Walleij <linus.walleij@...aro.org>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Grant Likely <grant.likely@...aro.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Linux-OMAP <linux-omap@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Enric Balletbo i Serra <eballetbo@...il.com>,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>,
Santosh Shilimkar <santosh.shilimkar@...com>,
Kevin Hilman <khilman@...aro.org>,
Balaji T K <balajitk@...com>,
Tony Lindgren <tony@...mide.com>,
Jon Hunter <jgchunter@...il.com>
Subject: Re: [PATCH] RFC: interrupt consistency check for OF GPIO IRQs
Am 11.09.2013 19:42, schrieb Alexander Holler:
> Am 11.09.2013 18:14, schrieb Javier Martinez Canillas:
>> So for example in an OMAP board DT you can define something like this:
>>
>> ethernet@5,0 {
>> compatible = "smsc,lan9221", "smsc,lan9115";
>> interrupt-parent = <&gpio6>;
>> interrupts = <16 8>;
>> };
>>
>> Since each OMAP GPIO bank has 32 GPIO pins, then what you are defining
>> is that
>> the GPIO 176 (5 * 32 + 16) will be mapped as the IRQ line for the
>> ethernet
>> controller.
By the way, how do you define two GPIOs/IRQs from different
gpio-banks/irq-controllers wuth that scheme?
Would that be like below?
ethernet@5,0 {
compatible = "smsc,lan9221", "smsc,lan9115";
interrupt-parent = <&gpio6>;
interrupts = <16 8>;
interrupt-parent = <&gpio7>;
interrupts = <1 IRQF_TRIGGER_FALLING>; /* GPIO7_1 */
};
So multiple definitions of interrupt-parent are allowed and the order
does matter? And such does work? Sorry for asking, but I'm relatively
new to DT. ;)
Regards,
Alexander Holler
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