linux-kernel - Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part

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Date:	Thu, 12 Sep 2013 15:37:23 +0530
From:	Kishon Vijay Abraham I <kishon@...com>
To:	Pratyush Anand <pratyush.anand@...com>
CC:	Jingoo Han <jg1.han@...sung.com>,
	"'Bjorn Helgaas'" <bhelgaas@...gle.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	"'Kukjin Kim'" <kgene.kim@...sung.com>,
	Mohit KUMAR DCG <Mohit.KUMAR@...com>,
	"'Arnd Bergmann'" <arnd@...db.de>,
	"'Sean Cross'" <xobs@...agi.com>,
	"'Thierry Reding'" <thierry.reding@...il.com>,
	"'SRIKANTH TUMKUR SHIVANAND'" <ts.srikanth@...sung.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys
 part and Exynos part

Hi,

On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
> Hi Kishon,
> 
> On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote:
>>> Hi Jingoo,
>>>
>>>
>>> On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote:
>>>> On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote:
>>>>>>> .
>>>>>>> .
>>>>>>>>>> +			of_pci_range_to_resource(&range, np, &pp->cfg);
>>>>>>>>>> +			pp->config.cfg0_size = resource_size(&pp->cfg)/2;
>>>>>>>>>> +			pp->config.cfg1_size = resource_size(&pp->cfg)/2;
>>>>>>>>>> +		}
>>>>>>>>>> +	}
>>>>>>>>>> +
>>>>>>>>>> +	pp->dbi_base = devm_ioremap(pp->dev, pp->cfg.start,
>>>>>>>>>> +				resource_size(&pp->cfg));
>>>>>>>>>
>>>>>>>>> Why is configuraion space divided into two?
>>>>>>>>
>>>>>>>> Sorry, I don't know the exact reason. :(
>>>>>>>> Pratyush Anand may know about this.
>>>>>>>> Pratyush Anand, could you answer the question?
>>>>>>>>
>>>>>>>> Also, if you find some problems, please let me know.
>>>>>
>>>>> One more query..
>>>>>
>>>>> Where is inbound translation configuration done in your driver? how should it
>>>>> be done?
>>>>
>>>
>>> Yes, Kishon is right. Inbound translation configuration is missing in
>>> your code and I think it should be implemented.
>>>
>>>> Hi Kishon,
>>>>
>>>> Sorry, I cannot understand your question exactly.
>>>> However, the following thread would be helpful.
>>>>
>>>> http://www.spinics.net/lists/arm-kernel/msg252078.html
>>>> https://lkml.org/lkml/2013/6/17/890
>>>
>>> From this conversation, It seems that you
>>> have tested this driver and it works fine without inbound translation
>>> function. I am sure that you would have tested a PCIe card with DMA
>>> capability such as PCIe2USB or PCIe2Ethernet. Since it worked, it
>>> means that by default your controller is supporting one to one mapping
>>> in case of inbound transaction even when address translation is enabled.
>>
>> btw, I'm testing Ethernet controller: Realtek Semiconductor Co., Ltd.
>> RTL8111/8168B PCI Express Gigabit Ethernet controller.
>>
>> when I do ifconfig eth0 up, I get *r8169 0000:01:00.0 eth0: link up.*
>> But I dont receive any packets and ping also fails and the tx and rx packet
>> count is also 0. Could it be related to inbound translation?
> 
> A PCIe analyser log would tell a definite cause. Most likely either
> inbound translation is not working or INTx/MSI is not working.

I have enabled only legacy interrupts. Whenever I connect or disconnect
ethernet cable I get link up/link down message and also the interrupt count for
eth0 increases. So I'm not doubting INTx interrupts as such.

btw configuring inbound translation once in dw_pcie_host_init enough is it? I
mean we use the same registers for configuring outbound translation also no? So
doesn't the inbound configuration gets lost?

Thanks
Kishon
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