linux-kernel - Re: [PATCH] x86: add pin control support to Intel low power subsystem

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Message-ID: <20130913200716.GH7393@intel.com>
Date:	Fri, 13 Sep 2013 23:07:16 +0300
From:	Mika Westerberg <mika.westerberg@...ux.intel.com>
To:	Mathias Nyman <mathias.nyman@...ux.intel.com>
Cc:	x86@...nel.org, linux-kernel@...r.kernel.org,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>
Subject: Re: [PATCH] x86: add pin control support to Intel low power subsystem

On Fri, Sep 13, 2013 at 05:02:29PM +0300, Mathias Nyman wrote:
> x86 chips with LPSS (low power subsystem) such as Lynxpoint and
> Baytrail have SoC like peripheral support and controllable pins.
> 
> At the moment, Baytrail needs the pinctrl-baytrail driver to let
> peripherals control their gpio resources, but more pincontrol functions
> such as pin muxing and grouping are possible to add later.
> 
> Signed-off-by: Mathias Nyman <mathias.nyman@...ux.intel.com>

Makes sense, and since there seems to be no way to enable pinctrl by
just selecting it from 'make XXXconfig',

Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
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