linux-kernel - [RFC PATCH 0/1] FPGA subsystem core

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <cover.1379519753.git.michal.simek@xilinx.com>
Date:	Wed, 18 Sep 2013 17:56:38 +0200
From:	Michal Simek <michal.simek@...inx.com>
To:	linux-kernel@...r.kernel.org, monstr@...str.eu
Cc:	Alan Tull <atull@...era.com>, Pavel Machek <pavel@....cz>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Dinh Nguyen <dinguyen@...era.com>,
	Philip Balister <philip@...ister.org>,
	Alessandro Rubini <rubini@...dd.com>,
	Dom Cobley <popcornmix@...il.com>,
	Mauro Carvalho Chehab <m.chehab@...sung.com>,
	David Brown <davidb@...eaurora.org>,
	"David S. Miller" <davem@...emloft.net>,
	Joe Perches <joe@...ches.com>,
	Cesar Eduardo Barros <cesarb@...arb.net>,
	Arnd Bergmann <arnd@...db.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Stephen Warren <swarren@...dia.com>
Subject: [RFC PATCH 0/1] FPGA subsystem core

Hi All,

this is the first attempt to introduce new Linux FPGA subsystem which
can help us to unify all fpga drivers which in general do the same
things.
Xilinx has hwicap in the kernel as char driver (drivers/char/xilinx_hwicap/)
and I would like to base Zynq devcfg driver based on this interface
because make no sense to push the Linux kernel another char driver
(I am testing this interface on this driver).

Based on my discussion at ELC with Greg KH the new driver
should support firmware interface for loading bitstream.

FPGA manager/driver just define set of functions and
call fpga_mgr_register().

struct fpga_manager_ops zynq_fpga_mgr_ops = {
	.status = zynq_fpga_status,
	.read_init = zynq_init,
	.write_init = zynq_init,
	.read = zynq_read,
	.write = zynq_write,
	.read_complete = zynq_complete,
	.write_complete = zynq_complete,
};

fpga_mgr_register(pdev, &zynq_fpga_mgr_ops, "Zynq FPGA Manager", priv);

For unregistration it is enough to call:
fpga_mgr_unregister(pdev);

Subsystem supports working with phandles for cases where you want to load
bitstreams for particular device though defined device.
For example:
mngr@0 {
	compatible = "whatever";
	fpga-mgr = <&ps7_dev_cfg_0>;
	...
} ;

With these lines you can get easily load bitstream to the device.

struct fpga_manager *mgr;
mgr = of_find_fpga_mgr_by_phandle(pdev->dev.of_node, "fpga-mgr");
if (mgr)
	mgr->fpga_write(mgr, "filename");

NOTE: I have added there of_find_fpga_mgr_by_node()
and of_find_fpga_mgr_by_phandle() but maybe they should be added
separately to drivers/of/of_fpga.c.

Alessandro: I haven't looked at your FMC cases but maybe this
could be also worth for your cases.

TODO:
- Probably make sense to create doc in Documentation folder too.
- When interface is fine also send zynq devcfg driver

Thanks for your comments,
Michal


Michal Simek (1):
  fpga: Introduce new fpga subsystem

 MAINTAINERS             |   7 +
 drivers/Kconfig         |   2 +
 drivers/Makefile        |   1 +
 drivers/fpga/Kconfig    |  18 ++
 drivers/fpga/Makefile   |   5 +
 drivers/fpga/fpga-mgr.c | 433 ++++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/fpga.h    | 105 ++++++++++++
 7 files changed, 571 insertions(+)
 create mode 100644 drivers/fpga/Kconfig
 create mode 100644 drivers/fpga/Makefile
 create mode 100644 drivers/fpga/fpga-mgr.c
 create mode 100644 include/linux/fpga.h

--
1.8.2.3


Content of type "application/pgp-signature" skipped