Message-ID: <20130918165657.GO21559@radagast>
Date:	Wed, 18 Sep 2013 11:56:57 -0500
From:	Felipe Balbi <balbi@...com>
To:	Mark Rutland <mark.rutland@....com>
CC:	Felipe Balbi <balbi@...com>, Kumar Gala <galak@...eaurora.org>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	Pawel Moll <Pawel.Moll@....com>,
	Stephen Warren <swarren@...dotorg.org>,
	Ian Campbell <ian.campbell@...rix.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] usb: dwc3: core: clarify usb-phy array binding

Hi,

On Wed, Sep 18, 2013 at 05:46:10PM +0100, Mark Rutland wrote:
> > > > I even wrote a patch making USB3 PHY optional, but didn't push it
> > > > exactly because it broke some other systems and I can't guarantee users
> > > > won't mess up their DTS/pdata.
> > > 
> > > Does that mean that their dts or pdata are wrong at the moment, but
> > > they're spared because the driver bails out due to a missing phy? If
> > > their pdata's wrong, that should be fixable relatively easily, but if
> > > the dt is wrong then I'm not sure how we can support those systems
> > > sensibly. That sounds like an ideal candidate for a dt quirks
> > > mechanism...
> > 
> > hmm, the idea of the patch was:
> > 
> > 	switch (maximum-speed) {
> > 	case SUPER:
> > 		grab_and_initialize_usb3_phy();
> > 		grab_and_initialize_usb2_phy();
> > 		break;
> > 	case HIGH:
> > 	case FULL:
> > 	case LOW:
> > 		grab_and_initialize_usb2_phy();
> > 		break;
> > 	}
> > 
> > now, imagine someone wants to run his dwc3 in highspeed mode, we
> > wouldn't initialize USB3 PHY which could cause the whole IP to break.
> 
> When you say wants to run it in highspeed mode, you mean that they want
> this configured at run-time, or they deliberately omit a phy when
> describing the hardware in the DT?

it doesn't really matter, I guess. TI's DRA7xx platforms, for instance,
don't even provide a USB3 PHY and now way to connect one (since PIPE3
interface isn't brought out of the chip).

Granted the problem is bigger in superspeed capable integration where we
want to run at highspeed for e.g. test purposes.

> For the former I appreciate that it's a problem, but for the latter I'd
> argue that's their fault. As far as I can see we initialise both PHYs in

true, we can look at it that way.

> the probe path and never uninitialise them, so the only problem would be
> if someone's trying to be too clever. As we never check the return value
> of usb_phy_init, they can still attempt to work around our best
> efforts...
> 
> I appreciate that we should not break existing DTs. More on that below.

k

> > I tried poking around on device's registers to see if there was any way
> > to detect that the IP needs somethin back from USB3 PHY, but couldn't
> > find anything.
> > 
> > Since we can't know how the IP was integrated, it's best to leave it
> > alone and require NOP xceiv to be used.
> 
> Agreed for the existing systems, but I still think we can work around
> this for new DTs...

perhaps, but wouldn't that be a quirk ? If it's a quirk, perhaps we'd be
better off adding a quirk flag to skip USB?PHY in some platforms. Then
we could:

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 474162e..5d39e0e 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -387,16 +387,29 @@ static int dwc3_probe(struct platform_device *pdev)
 	if (node) {
 		dwc->maximum_speed = of_usb_get_maximum_speed(node);
 
-		dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0);
-		dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1);
+		if (of_device_is_compatible(node, "ti,dra7xxx-dwc3"))
+			dwc->quirks |= DWC3_SKIP_USB3PHY;
+
+		if (!dwc->quirks & DWC3_SKIP_USB2_PHY)
+			dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev,
+					"usb-phy", 0);
+
+		if (!dwc->quirks & DWC3_SKIP_USB3_PHY)
+			dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev,
+					"usb-phy", 1);
 
 		dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
 		dwc->dr_mode = of_usb_get_dr_mode(node);
+
 	} else if (pdata) {
 		dwc->maximum_speed = pdata->maximum_speed;
+		dwc->quirks = pdata->quirks;
 
-		dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
-		dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
+		if (!dwc->quirks & DWC3_SKIP_USB2_PHY)
+			dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+
+		if (!dwc->quirks & DWC3_SKIP_USB3_PHY)
+			dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
 
 		dwc->needs_fifo_resize = pdata->tx_fifo_resize;
 		dwc->dr_mode = pdata->dr_mode;
@@ -732,6 +745,9 @@ static const struct dev_pm_ops dwc3_dev_pm_ops = {
 #ifdef CONFIG_OF
 static const struct of_device_id of_dwc3_match[] = {
 	{
+		.compatible = "ti,dra7xxx-dwc3",
+	},
+	{
 		.compatible = "snps,dwc3"
 	},
 	{

> > > > > You can describe the USB2-only case in the dt by only listing the first
> > > > > phy (though the driver won't support it as it expects both to be
> > > > > present), but it's impossible to describe that you've wired up a single
> > > > > phy that's USB3 capable.
> > > > 
> > > > you might be right there...
> > > 
> > > Would it be possible to have something like (an optional) usb-phy-names?
> > > If not present, we assume the current situation, if present then we use
> > > it to figure out which phys are present. Maybe I'm missing something
> > > that makes that impossible?
> > 
> > you're missing the point regarding the IP possibly needing something
> > back from the PHY (e.g. a clock which PHY generates).
> 
> I'm not sure why that detracts from the usb-phy-names idea -- if not
> present, we stick with the current behaviour and require both PHYs or
> fail early. No existing dts suddently explode, though none gain new
> functionality either.
> 
> If someone's explicitly placed usb-phy-names, we know that they're
> up-to-date on the lastest binding, something like:
> 
>  - usb-phy: A list of phandles to PHYs. If usb-phy-names is not
> 	    present, the USB2/HS PHY should be first, followed by the
> 	    USB3/SS PHY. If usb-phy-names is present, it defines the
> 	    order of PHYs.
> 
>  - usb-phy-names: The names of PHYs described in the usb-phy property.
> 		  Valid values are "usb2" and "usb3". Should be used iff
> 		  a subset of PHYs are connected.
> 
> 		  Compatibility note: The DWC3 IP can be integrated in
> 		  such a way as to require outputs from particular PHYs
> 		  for *any* level of operation. This cannot be detected
> 		  by the OS, and on such systems all required PHYs must
> 		  be described.
> 
> Given that, if they list fewer PHYs than present and their system really
> requires a particular PHY, we can quite happily allow their system to
> explode in the knowledge it's their fault, not ours :)

LOL :-) Perhaps :-D

> If they try to use their new DT on an old platform then the kernel will
> refuse to use the DWC3, which would currently be the case anyway.

right.

-- 
balbi

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