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Message-Id: <1380046016-5811-4-git-send-email-abrestic@chromium.org>
Date: Tue, 24 Sep 2013 11:06:54 -0700
From: Andrew Bresticker <abrestic@...omium.org>
To: linux-samsung-soc@...r.kernel.org,
Tomasz Figa <t.figa@...sung.com>,
Sylwester Nawrocki <sylvester.nawrocki@...il.com>
Cc: Rob Herring <rob.herring@...xeda.com>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Stephen Warren <swarren@...dotorg.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Rob Landley <rob@...dley.net>,
Kukjin Kim <kgene.kim@...sung.com>,
Russell King <linux@....linux.org.uk>,
Mike Turquette <mturquette@...aro.org>,
Grant Likely <grant.likely@...aro.org>,
Sachin Kamat <sachin.kamat@...aro.org>,
Jiri Kosina <jkosina@...e.cz>,
Rahul Sharma <rahul.sharma@...sung.com>,
Leela Krishna Amudala <l.krishna@...sung.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Tushar Behera <tushar.behera@...aro.org>,
Doug Anderson <dianders@...omium.org>,
Padmavathi Venna <padma.v@...sung.com>,
devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andrew Bresticker <abrestic@...omium.org>
Subject: [PATCH V3 4/6] ARM: dts: exynos5250: add input clocks to audss clock controller
Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.
Signed-off-by: Andrew Bresticker <abrestic@...omium.org>
---
Changes since v1:
- specified additional input clocks
---
arch/arm/boot/dts/exynos5250.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 7d7cc77..2d6a93d 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -88,6 +88,8 @@
compatible = "samsung,exynos5250-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
+ clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>;
+ clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
timer {
--
1.8.4
--
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