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Message-Id: <1380208411-31403-3-git-send-email-will.deacon@arm.com>
Date: Thu, 26 Sep 2013 16:13:30 +0100
From: Will Deacon <will.deacon@....com>
To: linux-kernel@...r.kernel.org
Cc: tony.luck@...el.com, torvalds@...ux-foundation.org,
linux-arch@...r.kernel.org, Will Deacon <will.deacon@....com>
Subject: [RFC PATCH 3/4] ia64: cmpxchg: implement dummy cmpxchg64_relaxed operation
cmpxchg64_relaxed can be used to provide barrier-less semantics for a
64-bit cmpxchg operation in cases where the strong memory ordering is
not required. A useful use-case for this is in the recently merged
lockless lockref code.
This patch implements a dummy implementation for ia64, which could
probably be improved by removing the half barrier associated with the
default cmpxchg64 macro.
Cc: Tony Luck <tony.luck@...el.com>
Signed-off-by: Will Deacon <will.deacon@....com>
---
arch/ia64/include/uapi/asm/cmpxchg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/ia64/include/uapi/asm/cmpxchg.h b/arch/ia64/include/uapi/asm/cmpxchg.h
index 4f37dbb..8984b6e 100644
--- a/arch/ia64/include/uapi/asm/cmpxchg.h
+++ b/arch/ia64/include/uapi/asm/cmpxchg.h
@@ -124,6 +124,7 @@ extern long ia64_cmpxchg_called_with_bad_pointer(void);
#define cmpxchg_local cmpxchg
#define cmpxchg64_local cmpxchg64
+#define cmpxchg64_relaxed cmpxchg64
#ifdef CONFIG_IA64_DEBUG_CMPXCHG
# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
--
1.8.2.2
--
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