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Message-ID: <20130926155330.GC4175@mudshark.cambridge.arm.com>
Date: Thu, 26 Sep 2013 16:53:31 +0100
From: Will Deacon <will.deacon@....com>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Tony Luck <tony.luck@...el.com>,
"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>
Subject: Re: [RFC PATCH 1/4] asm-generic: cmpxchg: implement dummy
cmpxchg64_relaxed operation
On Thu, Sep 26, 2013 at 04:34:04PM +0100, Linus Torvalds wrote:
> On Thu, Sep 26, 2013 at 8:13 AM, Will Deacon <will.deacon@....com> wrote:
> >
> > This patch implements a dummy implementation for asm-generic, falling
> > back to the usual cmpxchg64 code.
>
> I don't like the "let's add dummy operations for everybody who doesn't
> care" when it is this specialized.
>
> I'd much rather just add a single
>
> #ifndef cmpxchg64_relaxed
> # define cmpxchg64_relaxed cmpxchg64
> #endif
>
> to the LOCKREF code, and then ARM (and others) can define it as they wish.
Okey doke.
> And *if* anybody else ever realizes that they want this outside of the
> lockref code, let's look at doing that then. Right now I don't know of
> any users, and I'd be leery of people using this willy-nilly, because
> very few people really understand memory ordering.
Agreed, and I really doubt there are many cases where the cmpxchg hazarding
works out nicely so as to obviate the need for memory barriers.
I'll send a revised patch.
Cheers,
Will
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