linux-kernel - Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

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Date:	Thu, 26 Sep 2013 16:23:19 -0500
From:	Kumar Gala <galak@...eaurora.org>
To:	Rob Herring <robherring2@...il.com>
Cc:	Rohit Vaswani <rvaswani@...eaurora.org>,
	David Brown <davidb@...eaurora.org>,
	Rob Herring <rob.herring@...xeda.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Stephen Warren <swarren@...dotorg.org>,
	Ian Campbell <ian.campbell@...rix.com>,
	Russell King <linux@....linux.org.uk>,
	Daniel Walker <dwalker@...o99.com>,
	Bryan Huntsman <bryanh@...eaurora.org>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard


On Sep 26, 2013, at 4:10 PM, Rob Herring wrote:

> On 09/26/2013 02:33 PM, Kumar Gala wrote:
>> 
>> On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:
>> 
>>> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>>>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>>>> <snip>
>>>> 
>>>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -0,0
>>>>> +1,6 @@ +/include/ "qcom-msm8974.dtsi" + +/ { +    model =
>>>>> "Qualcomm APQ8074 Dragonboard"; +    compatible =
>>>>> "qcom,apq8074-dragonboard", "qcom,apq8074"; +}; diff --git
>>>>> a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi new file mode 100644 
>>>>> index 0000000..f04b643 --- /dev/null +++
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -0,0 +1,35 @@ 
>>>>> +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { +    model =
>>>>> "Qualcomm MSM8974"; +    compatible = "qcom,msm8974"; +
>>>>> interrupt-parent = <&intc>; + +    soc: soc { };
>>>>>>> We should have a unit address here:
>>>>>>> 
>>>>>>> soc: soc@...BAR {
>>>>>>> 
>>>>>>> also, split out the curly braces so any future patches do
>>>>>>> have to muck with that.
>>>>>>> 
>>>>>>> };
>>>>>>> 
>>>>>> Im not sure I understand the reasoning behind the unit
>>>>>> address for soc ?
>>>>> Its fairly standard practice and there is a fair amount of
>>>>> discussion about the lack of a unit address for memory nodes.
>>>>> 
>>>> That still doesn't really answer anything :) - and I couldn't
>>>> find any discussions about this either. I don't see anybody in
>>>> upstream adding an address to soc except sun. What is that
>>>> address supposed to be for - what does it mean ? The soc is way
>>>> of encapsulating meaningful blocks  for the particular SoC.
>>> 
>>> I see the mail from Stephen Warren for adding a check stating that
>>> 
>>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that
>>> any node that has a reg property must include a unit address in its
>>> name with value matching the first entry in its reg property.
>>> Conversely, if a node does not have a reg property, the node name
>>> must not include a unit address."
>>> 
>>> The soc node we have does not have a reg property ?
>> 
>> Not 100% sure what people will decide on this.  There are a number of
>> examples on the PPC side (arch/powerpc/boot/dts) that are soc@...R,
>> but they don't typically have "reg" properties at the soc level.
> 
> No, but you may have a ranges property which is related.
> 
> I've just hit this on highbank in needing to add a second bank of
> peripherals for midway. So my vote would be to have unit address.
> 
> Rob

So are we saying the rule for needing a unit-address being either 'reg' or 'ranges' ?

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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