linux-kernel - Re: Linux 3.12-rc2

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Message-Id: <20131001142421.6cd0870138caf2fe5600a1ea@linux-mips.org>
Date:	Tue, 1 Oct 2013 14:24:21 +0900
From:	Yoichi Yuasa <yuasa@...ux-mips.org>
To:	Aaro Koskinen <aaro.koskinen@....fi>
Cc:	yuasa@...ux-mips.org,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Ralf Baechle <ralf@...ux-mips.org>, linux-mips@...ux-mips.org,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: Linux 3.12-rc2 - MIPS regression

Hi,

On Sat, 28 Sep 2013 02:10:12 +0300
Aaro Koskinen <aaro.koskinen@....fi> wrote:

> Hi,
> 
> 3.12-rc2 breaks the boot (BUG: scheduling while atomic, see logs below)
> on Lemote Mini-PC (MIPS). According to git bisect, this is caused by:
> 
> ff522058bd717506b2fa066fa564657f2b86477e is the first bad commit
> commit ff522058bd717506b2fa066fa564657f2b86477e
> Author: Ralf Baechle <ralf@...ux-mips.org>
> Date:   Tue Sep 17 12:44:31 2013 +0200
> 
>     MIPS: Fix accessing to per-cpu data when flushing the cache
> 
> Reverting the commit from v3.12-rc2 makes the board boot fine.

Please try this patch on top of rc2.

MIPS: Fix forgotten preempt_enable() when CPU has inclusive pcaches

Signed-off-by: Yoichi Yuasa <yuasa@...ux-mips.org>

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 627883b..2492e60 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -609,6 +609,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
 			r4k_blast_scache();
 		else
 			blast_scache_range(addr, addr + size);
+		preempt_enable();
 		__sync();
 		return;
 	}
--
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