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Date:	Wed, 02 Oct 2013 12:00:52 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Michal Simek <michal.simek@...inx.com>
CC:	linux-kernel@...r.kernel.org, monstr@...str.eu,
	Alan Tull <atull@...era.com>, Pavel Machek <pavel@....cz>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Dinh Nguyen <dinguyen@...era.com>,
	Philip Balister <philip@...ister.org>,
	Alessandro Rubini <rubini@...dd.com>,
	Steffen Trumtrar <s.trumtrar@...gutronix.de>,
	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Jason Cooper <jason@...edaemon.net>,
	Yves Vandervennet <rocket.yvanderv@...il.com>,
	Kyle Teske <kyle.teske@...com>,
	Josh Cartwright <joshc@....teric.us>,
	Nicolas Pitre <nico@...aro.org>,
	Mark Langsdorf <mark.langsdorf@...xeda.com>,
	Felipe Balbi <balbi@...com>, linux-doc@...r.kernel.org,
	Mauro Carvalho Chehab <m.chehab@...sung.com>,
	David Brown <davidb@...eaurora.org>,
	Rob Landley <rob@...dley.net>,
	"David S. Miller" <davem@...emloft.net>,
	Joe Perches <joe@...ches.com>,
	Cesar Eduardo Barros <cesarb@...arb.net>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [RFC PATCH v2 0/1] FPGA subsystem core

On 10/02/2013 08:35 AM, Michal Simek wrote:
> 
> Based on my discussion at ELC with Greg KH the new driver should
> support firmware interface for loading bitstream.
> 

As I have previously stated, I think this is a mistake simply because
the firmware interface is a bad mapping on requirements for an FPGA,
especially once you account for the vast number of ways an FPGA can
get loaded and you take partial reconfiguration into account.  I
happen to be at a face to face meeting with Greg today, so I'll pick
his brain a bit.

	-hpa


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