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Message-ID: <CACRpkdac5iPqwv2Wb2uksn=cYtS0r=1+tSr4Cre2Xun0JBKzpA@mail.gmail.com>
Date: Tue, 8 Oct 2013 13:23:00 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Marc Zyngier <marc.zyngier@....com>
Cc: Sricharan R <r.sricharan@...com>,
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Mark Rutland <Mark.Rutland@....com>
Subject: Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for
routable irqs
On Mon, Sep 30, 2013 at 4:16 PM, Marc Zyngier <marc.zyngier@....com> wrote:
> On 30/09/13 14:59, Sricharan R wrote:
>> In some socs the gic can be preceded by a crossbar IP which
>> routes the peripheral interrupts to the gic inputs. The peripheral
>> interrupts are associated with a fixed crossbar input line and the
>> crossbar routes that to one of the free gic input line.
>>
>> The DT entries for peripherals provides the fixed crossbar input line
>> as its interrupt number and the mapping code should associate this with
>> a free gic input line. This patch adds the support inside the gic irqchip
>> to handle such routable irqs. The routable irqs are registered in a linear
>> domain. The registered routable domain's callback should be implemented
>> to get a free irq and to configure the IP to route it.
>
> Isn't this just another chained interrupt controller? How is it GIC
> specific?
I thought so from the beginning but I was dead wrong, as pointed out
by tglx it is basically a hardware .map function, so its usecase will map
to the irqdomain .map/.unmap so to say.
Yours,
Linus Walleij
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