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Message-ID: <20131009075538.GQ3521@intel.com>
Date:	Wed, 9 Oct 2013 10:55:38 +0300
From:	Mika Westerberg <mika.westerberg@...ux.intel.com>
To:	Romain Baeriswyl <Romain.Baeriswyl@...lis.com>
Cc:	Wolfram Sang <wsa@...-dreams.de>,
	Rob Herring <rob.herring@...xeda.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Stephen Warren <swarren@...dotorg.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Rob Landley <rob@...dley.net>,
	Pierrick Hascoet <pierrick.hascoet@...lis.com>,
	Vineet Gupta <vgupta@...opsys.com>,
	Christian Ruppert <christian.ruppert@...lis.com>,
	Chiau Ee Chew <chiau.ee.chew@...el.com>,
	Shinya Kuribayashi <skuribay@...ox.com>,
	Jean Delvare <khali@...ux-fr.org>,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
	Romain Baeriswyl <romainba@...lis.com>
Subject: Re: [PATCH 1/2] i2c designware make SCL and SDA falling time
 configurable

On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:
>  static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
> @@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
>  	u32 input_clock_khz;
>  	u32 hcnt, lcnt;
>  	u32 reg;
> +	u32 sda_falling_time, scl_falling_time;
>  
>  	input_clock_khz = dev->get_clk_rate_khz(dev);
>  
> @@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
>  
>  	/* set standard and fast speed deviders for high/low periods */
>  
> +	if (dev->sda_falling_time)
> +		sda_falling_time = dev->sda_falling_time;
> +	else
> +		sda_falling_time = 300; /* ns */

I think this looks better:

	sda_falling_time = dev->sda_falling_time ? dev->sda_falling_time : 300;

> +
> +	if (dev->scl_falling_time)
> +		scl_falling_time = dev->scl_falling_time;
> +	else
> +		scl_falling_time = 300; /* ns */

Ditto.

> +
>  	/* Standard-mode */
>  	hcnt = i2c_dw_scl_hcnt(input_clock_khz,
> -				40,	/* tHD;STA = tHIGH = 4.0 us */
> -				3,	/* tf = 0.3 us */
> +				4000,	/* tHD;STA = tHIGH = 4.0 us */
> +				sda_falling_time,
>  				0,	/* 0: DW default, 1: Ideal */
>  				0);	/* No offset */
>  	lcnt = i2c_dw_scl_lcnt(input_clock_khz,
> -				47,	/* tLOW = 4.7 us */
> -				3,	/* tf = 0.3 us */
> +				4700,	/* tLOW = 4.7 us */
> +				scl_falling_time,
>  				0);	/* No offset */
>  
>  	/* Allow platforms to specify the ideal HCNT and LCNT values */
--
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