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Message-ID: <5255254D.4090108@nvidia.com>
Date:	Wed, 9 Oct 2013 15:13:41 +0530
From:	Laxman Dewangan <ldewangan@...dia.com>
To:	Mark Rutland <mark.rutland@....com>
CC:	Nishanth Menon <nm@...com>,
	"mturquette@...aro.org" <mturquette@...aro.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Stephen Warren <swarren@...dia.com>,
	Pawel Moll <Pawel.Moll@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	"broonie@...aro.org" <broonie@...aro.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"rob@...dley.net" <rob@...dley.net>,
	"grant.likely@...aro.org" <grant.likely@...aro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	J Keerthy <j-keerthy@...com>
Subject: Re: [PATCH V3] clk: palmas: add clock driver for palmas

On Tuesday 08 October 2013 08:58 PM, Mark Rutland wrote:
> On Tue, Oct 08, 2013 at 03:39:54PM +0100, Laxman Dewangan wrote:
>>
>>>> +
>>>> +     Optional subnode properties:
>>>> +     ti,clock-boot-enable: Enable clock at the time of booting.
>>> Dumb question: Why is this needed? should'nt relevant drivers do a
>>> clk_get to enable the relevant clocks?
>> If some board needs this clock to be always available for rest of system
>> to work without any specific driver then this flag is useful.
> Do we _actually_ need this right now, or is this hypothetical?
>
> If we don't need it now, remove it. If you think we need it know, please
> describe exactly why (i.e. what device needs the clock to work, why does
> this affect the rest of the board if we don't ahve a driver for that
> device, why don't we just write a driver for that device).
>

Ok, I will remove it. Going with nothing free of cost for the 
driver/system and client need to call the proper APIs.

>>
>>>> +     ti,external-sleep-control: The clock is enable/disabled by state
>>>> +             of external enable input pins ENABLE, ENABLE2 and NSLEEP.
>>>> +             The valid value for the external pins are:
>>>> +                     1 for ENABLE1
>>>> +                     2 for ENABLE2
>>>> +                     3 for NSLEEP.
> I asked this on the last version (before having noticed this one). What
> actually drives those pins to control the clock(s)?
>
> Is this for setting the clock to be controlled by the external pin, or
> is the clock hard-wired to a particular pin?
>

This is for setting the clock to be controlled by the external pin.

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