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Message-ID: <525520BA.3010304@free-electrons.com>
Date: Wed, 09 Oct 2013 11:24:10 +0200
From: Gregory CLEMENT <gregory.clement@...e-electrons.com>
To: Jisheng Zhang <jszhang@...vell.com>
CC: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Russell King <linux@....linux.org.uk>,
Jason Cooper <jason@...edaemon.net>,
Arnd Bergmann <arnd@...db.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 8/8] ARM: add initial support for Marvell Berlin SoCs
Hello Jisheng,
[...]
>> +config MACH_MV88DE3100
> Can you please use MACH_BERLIN2? This is what we used internally in latest BSP
>> + bool "Marvell 88DE3100 (Armada 1500)"
>> + select ARM_GIC
>> + select CACHE_L2X0
> The tauros3 and PL310 are different although the programming interface are
> compatible. In PJ4B and Tauros3, the CP15 cache maintenance commands include
> both L1 and L2, memory mapped PA-based maintenance operations in L2 are not needed.
> How to handle this in cache-l2x0.c?
In this case you can do the same things we have done for Aurora when we use
the "aurora-system-cache" compatible string.
[...]
Regards,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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