linux-kernel - Re: [PATCH 3/6] pinctrl: single: Prepare for supporting SoC specific features

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Message-ID: <CAN1soZwXn5SSgTFQ11PJGK19ZQ==uKcPCF2COpEE_eiMAM13uw@mail.gmail.com>
Date:	Wed, 9 Oct 2013 13:03:17 +0800
From:	Haojian Zhuang <haojian.zhuang@...il.com>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Tony Lindgren <tony@...mide.com>,
	Haojian Zhuang <haojian.zhuang@...vell.com>,
	Grygorii Strashko <grygorii.strashko@...com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Peter Ujfalusi <peter.ujfalusi@...com>,
	Prakash Manjunathappa <prakash.pm@...com>,
	Haojian Zhuang <haojian.zhuang@...aro.org>,
	Linux-OMAP <linux-omap@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Roger Quadros <rogerq@...com>
Subject: Re: [PATCH 3/6] pinctrl: single: Prepare for supporting SoC specific features

On Tue, Oct 8, 2013 at 7:55 PM, Linus Walleij <linus.walleij@...aro.org> wrote:
> On Mon, Oct 7, 2013 at 7:35 PM, Tony Lindgren <tony@...mide.com> wrote:
>
>> Hi Linus W,
>>
>> Any comments on the pinctrl patches 3 - 5 in this series?
>
> I have no problems with this patch #3, as it is just changing syntax,
> not semantics.
>
> The problems start with patch #4.
>
> I am tormented with mixed feelings about this, because from one point of
> view I feel it is breaking the promise of pinctrl-single being a
> driver for platforms
> where a pin is controlled by a *single* register.
>
> If this was pinctrl-foo.c I would not have been so much bothered,
> but now it is something that was supposed to be self-contained and
> simple, pertaining to a single register, starting to look like something
> else.
>
> This is a bit like: "oh yeah just one register controls the pins, but under
> some circumstances I also want to mess with this register over here,
> and then this register over there ..." etc.
>
> I'd like Haojian to ACK this to proceed since he's also using this driver
> now. Then I feel better on continuing down this road ...
>
> Then I have a lesser comment on patch #4 since it makes it possible
> for this pin controller to support wake-up interrupt, as I don't see how
> this plays out with front-end GPIO controllers, but let's discuss that
> in the context of that patch.
>
> Yours,
> Linus Walleij
>

I'm OK on both #3 & #4. So Acked-by: Haojian Zhuang <haojian.zhuang@...il.com>

Regards
Haojian
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