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Date: Tue, 15 Oct 2013 12:51:59 +0200 From: Borislav Petkov <bp@...en8.de> To: Ingo Molnar <mingo@...nel.org> Cc: Joe Perches <joe@...ches.com>, Eric Dumazet <eric.dumazet@...il.com>, Neil Horman <nhorman@...driver.com>, linux-kernel@...r.kernel.org, sebastien.dugue@...l.net, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org Subject: Re: [PATCH] x86: Run checksumming in parallel accross multiple alu's On Tue, Oct 15, 2013 at 09:41:23AM +0200, Ingo Molnar wrote: > Most processors have hundreds of cachelines even in their L1 cache. > Thousands in the L2 cache, up to hundreds of thousands. Also, I have this hazy memory of prefetch hints being harmful in some situations: https://lwn.net/Articles/444344/ -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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