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Message-ID: <1785136.Xbc2LARBDy@flatron>
Date:	Wed, 16 Oct 2013 00:52:42 +0200
From:	Tomasz Figa <tomasz.figa@...il.com>
To:	Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
Cc:	mturquette@...aro.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, patches@...nsource.wolfsonmicro.com
Subject: Re: [PATCH] clk: s3c64xx: Correct spi bus clock hookups

Hi Charles,

On Tuesday 15 of October 2013 13:26:22 Charles Keepax wrote:
> Correct the SPI bus clock hookups to match their state before the switch
> to this driver. With out this patch my system (based on an s3c6410)
> can't locate any spibus clock.

That's right, a patch like this is needed indeed, however...

> Note, I only have a passing familiarity with this driver and subsystem
> so this patch could probably use a careful eye.
> 
> Signed-off-by: Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
> ---
>  drivers/clk/samsung/clk-s3c64xx.c |    8 ++++++--
>  1 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/samsung/clk-s3c64xx.c
> b/drivers/clk/samsung/clk-s3c64xx.c index 7d2c842..f6ac974 100644
> --- a/drivers/clk/samsung/clk-s3c64xx.c
> +++ b/drivers/clk/samsung/clk-s3c64xx.c
> @@ -356,8 +356,12 @@ static struct samsung_clock_alias
> s3c64xx_clock_aliases[] = { ALIAS(SCLK_MMC2, "s3c-sdhci.2",
> "mmc_busclk.2"),
>  	ALIAS(SCLK_MMC1, "s3c-sdhci.1", "mmc_busclk.2"),
>  	ALIAS(SCLK_MMC0, "s3c-sdhci.0", "mmc_busclk.2"),
> -	ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi-bus"),
> -	ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi-bus"),
> +	ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi_busclk0"),
> +	ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi_busclk1"),
> +	ALIAS(SCLK_SPI1_48, "s3c6410-spi.1", "spi_busclk2"),

...according to the documentation, the order is different. The SPI_CLKSEL 
field of CLK_CFG register of the SPI block can have following values:
0 - PCLK (aka PCLK_SPIx)
1 - USBCLK (aka SCLK_SPIx_48)
2 - Epll clock (aka SCLK_SPIx)

The index after spi_busclk corresponds to the value written to SPI_CLKSEL 
field, so your patch should be adjusted accordingly.

By the way, the USBCLK case is a bit strange, because it requires USB 
signal mask to be unmasked, which in turn needs USB PHY to be enabled, as 
otherwise some "unwanted leakage" can occur. Having to enable USB just to 
use SPI seems rather inconvenient (especially in terms of power 
consumption), so the usability of this clock is rather limited and it 
might be better not to let the driver know about it.

Best regards,
Tomasz

P.S. Please keep linux-samsung-soc mailing list on Cc when sending patches 
for Samsung hardware.

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