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Message-ID: <1381960030-1640-3-git-send-email-tim.kryger@linaro.org>
Date: Wed, 16 Oct 2013 14:47:06 -0700
From: "Tim Kryger" <tim.kryger@...aro.org>
To: "Christian Daudt" <bcm@...thebug.org>,
"Rob Herring" <rob.herring@...xeda.com>,
"Pawel Moll" <pawel.moll@....com>,
"Mark Rutland" <mark.rutland@....com>,
"Stephen Warren" <swarren@...dotorg.org>,
"Ian Campbell" <ijc+devicetree@...lion.org.uk>,
"Daniel Lezcano" <daniel.lezcano@...aro.org>,
"Thomas Gleixner" <tglx@...utronix.de>,
"Chris Ball" <cjb@...top.org>
cc: "Tim Kryger" <tim.kryger@...aro.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mmc@...r.kernel.org, patches@...aro.org
Subject: [RESEND PATCH v2 2/6] ARM: dts: Specify clocks for UARTs on
bcm11351
Rather than declaring the frequency of the external clock, specify the
label of the clock such that the driver may determine the frequency on
its own.
Signed-off-by: Tim Kryger <tim.kryger@...aro.org>
Reviewed-by: Markus Mayer <markus.mayer@...aro.org>
Reviewed-by: Matt Porter <matt.porter@...aro.org>
---
arch/arm/boot/dts/bcm11351.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index c6464fb..ce65367 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -43,7 +43,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e000000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb_clk>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -53,7 +53,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e001000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb2_clk>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -63,7 +63,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e002000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb3_clk>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -73,7 +73,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e003000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb4_clk>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
--
1.8.0.1
--
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