linux-kernel - [PATCH v1.1 1/3] MAINTAINERS: INTEL MID SOC: add maintainers

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Message-Id: <1382132073-11294-1-git-send-email-david.a.cohen@linux.intel.com>
Date:	Fri, 18 Oct 2013 14:34:33 -0700
From:	David Cohen <david.a.cohen@...ux.intel.com>
To:	tglx@...utronix.de, hpa@...or.com, mingo@...hat.com, x86@...nel.org
Cc:	sathyanarayanan.kuppuswamy@...ux.intel.com,
	linux-kernel@...r.kernel.org,
	David Cohen <david.a.cohen@...ux.intel.com>
Subject: [PATCH v1.1 1/3] MAINTAINERS: INTEL MID SOC: add maintainers

Low-power Intel MID SoC support is currently quite outdated.
The code is meant for the old Moorestown platform and has not proper
support for newer platforms like Medfield, Clovertrail, Merrifield, ...

This patch adds official maintainers for such platforms in order to get
things in a better shape from now on.

Signed-off-by: David Cohen <david.a.cohen@...ux.intel.com>
Cc: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
---
 MAINTAINERS | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7534a80..25a0aa0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5203,6 +5203,15 @@ W:	logfs.org
 S:	Maintained
 F:	fs/logfs/
 
+LOW-POWER INTEL MID SOC SUPPORT
+M:	David Cohen <david.a.cohen@...ux.intel.com>
+M:	Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
+S:	Supported
+F:	arch/x86/platform/intel-mid/
+F:	arch/x86/pci/intel_mid_pci.c
+F:	arch/x86/include/asm/intel-mid.h
+F:	arch/x86/include/asm/intel_mid*.h
+
 LPC32XX MACHINE SUPPORT
 M:	Roland Stigge <stigge@...com.de>
 L:	linux-arm-kernel@...ts.infradead.org (moderated for non-subscribers)
-- 
1.8.4.rc3

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