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Message-ID: <5266AA0F.1030603@linutronix.de>
Date: Tue, 22 Oct 2013 18:38:39 +0200
From: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
To: Lee Jones <lee.jones@...aro.org>
CC: Zubair Lutfullah <zubair.lutfullah@...il.com>,
sameo@...ux.intel.com, linux-kernel@...r.kernel.org,
gregkh@...uxfoundation.org
Subject: Re: [PATCH] mfd: ti_am335x_tscadc: fix spin lock and reg_cache
On 10/22/2013 06:05 PM, Lee Jones wrote:
>> I added reg_se_cache to cache the content of REG_SE once and
>> synchronize it among TSC & ADC access. REG_SE is set to 0 by the HW
>> after "work" has been done. So you need to know the old value or TSC may
>> disable ADC and the other way around.
>
> Yep, it's initialised as '0'.
>
> 12.5.1.15 STEPENABLE Register (offset = 54h) [reset = 0h]
Ehm yes but!. After init it is set to 0, correct. The value was never
read from the HW. It was always set via am335x_tsc_se_set() to "cache
| argument" and written to HW from both sides (TSC, ADC). This
initialization is done at ->probe() time in both drivers.
The value remains (remained) constant over the whole time
so both drivers only called am335x_tsc_se_update() to set the value
(the enabled steps of both sides) back to the register (because after
the conversation the value was 0 according to my memory) and since
32bit reads are atomic I didn't use a lock here.
Sebastian
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