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Date:	Mon, 28 Oct 2013 18:18:08 +0900
From:	Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>
To:	paulmck@...ux.vnet.ibm.com
Cc:	Steven Rostedt <rostedt@...dmis.org>,
	Petr Mladek <pmladek@...e.cz>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Jiri Kosina <jkosina@...e.cz>, linux-kernel@...r.kernel.org,
	x86@...nel.org,
	"yrl.pp-manager.tt@...achi.com" <yrl.pp-manager.tt@...achi.com>
Subject: Re: [PATCH 2/6] x86: allow to call text_poke_bp during boot

(2013/10/21 0:42), Paul E. McKenney wrote:
> On Sat, Oct 19, 2013 at 06:02:39PM -0400, Steven Rostedt wrote:
>> On Sat, 19 Oct 2013 14:33:50 -0700
>> "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com> wrote:
>>
>>
>>>>> It's used to convert the calls to mcount to nops. But maybe a better
>>>>> thing to do is to check if we only have a single CPU:
>>>>>
>>>>> static void run_sync(void)
>>>>> {
>>>>> 	if (num_online_cpus() != 1)
>>>>
>>>> Hmm, to be more robust to handle our future "ideal" machines, perhaps
>>>> this should be:
>>>>
>>>> 	/* Ideally we would like to run on zero CPUS! */
>>>> 	if (num_online_cpus() < 2)
>>>
>>
>> Bah! And for such a simple computation, I got it wrong.
>>
>>
>> 	/* Ideally we would like to run on zero CPUS! */
>> 	if (num_online_cpus > 1)
>>
>> But I guess the question comes. If we are running on zero CPUS, should
>> we perform the "on_each_cpu(do_sync_core, NULL, 1);" or not? Same goes
>> with 5i-3 CPUS, or negative number CPUs. If we need to do on_each_cpu(),
>> then I guess the != 1 will suffice.
> 
> Makes sense to me!  Whoever adds the ability to run on zero, negative,
> or complex numbers of CPUs can adjust on_each_cpu() accordingly.

Thanks for making it clear!

Petr, could you update your patch according to this discussion?
I think temporally enabling irq is not a good idea.

BTW, adding an assertion(BUG_ON(irq_disabled()) at the top of text_poke_bp)
will be good for debugging.

Thanks again!

-- 
Masami HIRAMATSU
IT Management Research Dept. Linux Technology Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu.pt@...achi.com


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