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Message-ID: <20131031151423.GX19466@laptop.lan>
Date: Thu, 31 Oct 2013 16:14:23 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Stephane Eranian <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, mingo@...e.hu, ak@...ux.intel.com,
acme@...hat.com, jolsa@...hat.com, zheng.z.yan@...el.com,
bp@...en8.de, maria.n.dimakopoulou@...il.com
Subject: Re: [PATCH v4 3/4] perf/x86: add Intel RAPL PMU support
On Thu, Oct 31, 2013 at 03:59:41PM +0100, Stephane Eranian wrote:
> +/*
> + * we compute in 0.23 nJ increments regardless of MSR
We don't in fact use 0.23 nJ, we use 2^-32 J.
> + */
> +EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3e-10");
> +EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3e-10");
> +EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3e-10");
Am I weird for proposing we use:
"2.3283064365386962890625e-10"
instead? Its not like anybody needs to go type this by hand.
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