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Message-ID: <5ac67859-a0b2-47f5-bdc2-c2a52b8d6885@email.android.com>
Date:	Sun, 10 Nov 2013 14:10:36 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Joe Perches <joe@...ches.com>, mingo@...nel.org,
	linux-kernel@...r.kernel.org, tglx@...utronix.de,
	james.t.kukunas@...el.com, hpa@...ux.intel.com,
	Linus Torvalds <torvalds@...ux-foundation.org>
CC:	David Miller <davem@...emloft.net>
Subject: Re: [tip:x86/asm] x86, bitops:  Change bitops to be native operand size

Yes, on the generic it is int.

The problem is in part that some architectures have bitop instructions with specific behavior.

Joe Perches <joe@...ches.com> wrote:
>On Tue, 2013-07-16 at 18:15 -0700, tip-bot for H. Peter Anvin wrote:
>> Commit-ID:  9b710506a03b01a9fdd83962912bc9d8237b82e8
>[]
>> x86, bitops: Change bitops to be native operand size
>> 
>> Change the bitops operation to be naturally "long", i.e. 63 bits on
>> the 64-bit kernel.  Additional bugs are likely to crop up in the
>> future.
>
>> We already have bugs which machines with > 16 TiB of memory in a
>> single node, as can happen if memory is interleaved.  The x86 bitop
>> operations take a signed index, so using an unsigned type is not an
>> option.
>
>I think it odd that any bitop index nr should be
>anything other than unsigned long for any arch.
>
>Why should this arch be any different than the
>defined type in Documentation/atomic_ops.txt?
>
>What value is a negative index when the bitmap
>array address passed is the starting 0th bit?
>
>btw: asm-generic/bitops.h doesn't match
>Documentation/atomic_ops.txt either.

-- 
Sent from my mobile phone.  Please pardon brevity and lack of formatting.
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