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Message-ID: <CAGG-pUTZMpPWGzigXhW9AcrGDksEGLJyPPBtDVo65nFGNPP=aw@mail.gmail.com>
Date: Tue, 12 Nov 2013 12:38:53 -0200
From: Geyslan Gregório Bem <geyslan@...il.com>
To: Måns Rullgård <mans@...sr.com>
Cc: a.p.zijlstra@...llo.nl, paulus@...ba.org,
Ingo Molnar <mingo@...hat.com>, acme@...stprotocols.net,
kernel-br <kernel-br@...glegroups.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [RFC] Coverity 1128445 - Reliance on integer endianness
2013/11/12 Måns Rullgård <mans@...sr.com>:
> Geyslan Gregório Bem <geyslan@...il.com> writes:
>
>> Hi,
>>
>> Coverity detected in 'arch/x86/kernel/cpu/perf_event_intel_uncore.c' a
>> possible reliance on integer endianness. Is that a positive one?
>
> No, x86 is always little endian.
>
>> static u64 ivt_uncore_irp_read_counter(struct intel_uncore_box *box,
>> struct perf_event *event)
>> 1369{
>> 1370 struct pci_dev *pdev = box->pci_dev;
>> 1371 struct hw_perf_event *hwc = &event->hw;
>> 1372 u64 count = 0;
>> 1373
>>
>> CID 1128445 (#1 of 1): Reliance on integer endianness
>> (INCOMPATIBLE_CAST)incompatible_cast: Pointer "&count" points to an
>> object whose effective type is "unsigned long long" (64 bits,
>> unsigned) but is dereferenced as a narrower "unsigned int" (32 bits,
>> unsigned). This may lead to unexpected results depending on machine
>> endianness.[show details]
>>
>> 1374 pci_read_config_dword(pdev, ivt_uncore_irp_ctrs[hwc->idx],
>> (u32 *)&count);
>> 1375 pci_read_config_dword(pdev, ivt_uncore_irp_ctrs[hwc->idx]
>> + 4, (u32 *)&count + 1);
>> 1376
>> 1377 return count;
>> 1378}
>
> This looks intentional and correct apart from possible strict aliasing
> issues.
>
> --
> Måns Rullgård
> mans@...sr.com
All right. Thanks.
--
Regards,
Geyslan G. Bem
hackingbits.com
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