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Message-ID: <20131128112235.GA27568@sirena.org.uk>
Date:	Thu, 28 Nov 2013 11:22:35 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Chew Chiau Ee <chiau.ee.chew@...el.com>
Cc:	Eric Miao <eric.y.miao@...il.com>,
	Russell King <linux@....linux.org.uk>,
	Haojian Zhuang <haojian.zhuang@...il.com>,
	linux-arm-kernel@...ts.infradead.org, linux-spi@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH] spi/pxa2xx: Restore private register bits.

On Fri, Nov 29, 2013 at 02:13:11AM +0800, Chew Chiau Ee wrote:
> From: Chew, Chiau Ee <chiau.ee.chew@...el.com>
> 
> The Intel LPSS SPI private register bits have to be restored
> when system resume from S3 suspend.

Applied, thanks.

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