lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <52A10C7B.8070406@wwwdotorg.org>
Date:	Thu, 05 Dec 2013 16:30:03 -0700
From:	Stephen Warren <swarren@...dotorg.org>
To:	Laxman Dewangan <ldewangan@...dia.com>, linus.walleij@...aro.org,
	thierry.reding@...il.com, Thierry Reding <treding@...dia.com>
CC:	rob.herring@...xeda.com, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, grant.likely@...aro.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Ashwini Ghuge <aghuge@...dia.com>
Subject: Re: [PATCH 4/4] pinctrl: tegra: add pinmux controller driver for
 Tegra124

On 12/05/2013 03:57 AM, Laxman Dewangan wrote:
> From: Ashwini Ghuge <aghuge@...dia.com>
> 
> This adds a driver for the Tegra124 pinmux, and required
> parameterization data for Tegra124.
> 
> The driver uses the common Tegra pincontrol driver utility
> functions to implement the majority of the driver.
> 
> This driver is not compatible with the earlier NVIDIA's SoCs,
> hence add new compatibile as "nvidia,tegra124-pinmux".
> 
> Originally written by Ashwini Gguhe.
> ldewangan:
>         - cleanup the patches,
>         - Fix address issue.

IIRC, Thierry mentioned he had some fixes in his local branch for this
driver. Thierry, can you please confirm/deny this?

I made the following comment on the version Ashwini posted, which hasn't
been addressed yet:

A day or two ago during upstream review:

>> +static const struct tegra_function  tegra124_functions[] = {
> ...
>> +	FUNCTION(i2c1),
>> +	FUNCTION(i2c2),
>> +	FUNCTION(i2c3),
>> +	FUNCTION(i2c4),
>> +	FUNCTION(i2cpwr),
> 
> Is that complete? Tegra124 apparently has 6 I2C controllers. Are the
> pins for the new sixth controller (0x7000d100) not affected by the pinmux?

That said, if we find things are missing, I suppose we can add them
later without breaking existing ABI. Breakage would only happen if we
had to change/remove something.

During downstream review quite a while ago I also said:

>> > +static const struct pinctrl_pin_desc  tegra124_pins[] = {
>> 
>> There are two spaces before "tegra124_pins[]".
>> 
>> > +static const char * const gmi_groups[] = {
>> > +	"uart2_cts_n_pj5",
>> > +	"uart2_rts_n_pj6",
>> > +	"uart3_txd_pw6",
>> > +	"uart3_rxd_pw7",
>> > +	"uart3_cts_n_pa1",
>> > +	"uart3_rts_n_pc0",
>> > +
>> > +	"pu0",
>> 
>> It'd be best not to have blank lines in the middle of arrays. The same comment exists elsewhere in the
>> file, so make sure you search the whole file.

Nits:

- There are some cases of multiple blank lines back-to-back.
- There's a blank line at the end of the file.

Aside from those minor issues, patches 1/4 and 4/4,
Acked-by: Stephen Warren <swarren@...dia.com>

(BTW, those 2 patches would go through the pinctrl tree, and patches 2/4
and 3/4 would go through the Tegra tree. You generally shouldn't posted
patches that will be applied to different trees in the same series,
since there aren't dependencies).
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ