| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1386357684.7375.124.camel@snotra.buserror.net> Date: Fri, 6 Dec 2013 13:21:24 -0600 From: Scott Wood <scottwood@...escale.com> To: <hongbo.zhang@...escale.com> CC: <benh@...nel.crashing.org>, <linuxppc-dev@...ts.ozlabs.org>, <linux-kernel@...r.kernel.org> Subject: Re: [PATCH] DTS: DMA: Fix DMA3 interrupts On Fri, 2013-11-29 at 16:07 +0800, hongbo.zhang@...escale.com wrote: > From: Hongbo Zhang <hongbo.zhang@...escale.com> > > MPIC registers for internal interrupts is non-continous in address, any > internal interrupt number greater than 159 should be added (16+208) to work. > 16 is due to external interrupts as usual, 208 is due to the non-continous MPIC > register space. > Tested on T4240 rev2 with SRIO2 disabled. > > Signed-off-by: Hongbo Zhang <hongbo.zhang@...escale.com> > --- > arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) The FSL MPIC binding should be updated to point out how this works. Technically it's not a change to the binding itself, since it's defined in terms of register offset, but the explanatory text says "So interrupt 0 is at offset 0x0, interrupt 1 is at offset 0x20, and so on." which is not accurate for these new high interrupt numbers. -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists