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Message-ID: <20131209191620.GN24519@lukather>
Date:	Mon, 9 Dec 2013 20:16:20 +0100
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	Olliver Schinagl <oliver+list@...inagl.nl>
Cc:	oliver@...inagl.nl, tj@...nel.org, grant.likely@...aro.org,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	linux-ide@...r.kernel.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, dev@...ux-sunxi.org,
	ijc@...lion.org.uk, hdegoede@...hat.com
Subject: Re: [PATCH 3/3] ARM: sunxi: dts: Add ahci support to a few A10 and
 A20 boards

On Sat, Dec 07, 2013 at 12:47:39PM +0100, Olliver Schinagl wrote:
> Hey maxime,
> On 06-12-13 19:33, Maxime Ripard wrote:
> >Hi Oliver,
> >
> >On Wed, Dec 04, 2013 at 01:10:55PM +0100, oliver@...inagl.nl wrote:
> >>From: Oliver Schinagl <oliver@...inagl.nl>
> >>
> >>This patch adds sunxi sata support to A10 and A20 boards that have such
> >>a connector. Some boards also feature a regulator via a GPIO and support
> >>for this is also added.
> >>
> >>Signed-off-by: Olliver Schinagl <oliver@...inagl.nl>
> >
> >Your git setup seems to be pretty uncertain about how your first name is spelled :)
> I should have formally mention it to confuse less people,
> 
> This is how officially my name is spelled (I left out any 'middle'
> letters. I never really used it as such, as it confuses people and
> they always write it wrong anyway. After years I decided that at
> least on these patches, I should write it down properly
> (googleability etc in the future). So formally it's Olliver 'oliver'
> M. Schinagl.
> 
> And no, I won't share my middle name :p
> 
> There! :)

My point was more that the spelling in your From is different from the
spelling in your SoB.

> >>diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
> >>index 0552a64..b72c69e 100644
> >>--- a/arch/arm/boot/dts/sun7i-a20.dtsi
> >>+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> >>@@ -368,6 +368,15 @@
> >>  			};
> >>  		};
> >>
> >>+		sata: ahci@...18000 {
> >>+			compatible = "allwinner,sun4i-a10-ahci";
> >>+			reg = <0x01c18000 0x1000>;
> >>+			interrupts = <0 56 1>;
> Will always fix this to <0 56 4> if i'm not mistaken.

Only the GIC has a three-cells interrupts. So only the A20 and A31 are
supposed to have this value.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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