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Message-ID: <CAA+hA=SuhppL9Ejm1NSRrNmYZ_sE3Xnzf2gLSVYkFf7msEZNHw@mail.gmail.com>
Date: Fri, 20 Dec 2013 11:00:23 +0800
From: Dong Aisheng <dongas86@...il.com>
To: David Cohen <david.a.cohen@...ux.intel.com>
Cc: Chris Ball <cjb@...top.org>,
Adrian Hunter <adrian.hunter@...el.com>,
gregkh@...uxfoundation.org,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
chuanxiao.dong@...el.com
Subject: Re: [RFC/PATCH 0/2] mmc: sdhci: Workaround Intel Merrifield issue for HS200
On Wed, Nov 13, 2013 at 5:49 AM, David Cohen
<david.a.cohen@...ux.intel.com> wrote:
> On 10/29/2013 10:58 AM, David Cohen wrote:
>>
>> Hi,
>>
>> SDHCI used to work well on Intel Merrifield until this patch was applied:
>>
>> commit 156e14b126ffb6f040bc6f1aff3c51077e42a744
>> Author: Giuseppe CAVALLARO <peppe.cavallaro@...com>
>> Date: Wed Jun 12 08:16:38 2013 +0200
>>
>> mmc: sdhci: fix caps2 for HS200
>>
>> Although the HC supports HS200 (eMMC) the caps2 are always zero; this
>> means there's no way to use the super speed mode (when init the
>> card).
>>
>> If the HC support SDR104, for SD3.0, so it also supports HS200 for
>> eMMC
>> and this patch just sets the MMC_CAP2_HS200 in the host caps2 field.
>>
>> Looks like there is a hw issue with unknown root cause so far.
>>
>> Is it acceptable to have the quirk I'm proposing to workaround the issue?
>
>
> Ping. Any comments here?
>
Chris,
Can you pick this one?
IMX also needs this quirk for imx6q/dl since it can not meet HS200
timing requirement.
David,
Is the unkonwn hw issue in your patch #2 resolved now?
If yes, you may not need this quirk.
I could resend it with your sign-off with IMX patches.
Regards
Dong Aisheng
> Br, David Cohen
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