linux-kernel - Re: [PATCH v6][RESEND] platform: x86: New BayTrail IOSF-SB MBI driver

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Message-ID: <52CC55EF.90006@infradead.org>
Date:	Tue, 07 Jan 2014 11:30:55 -0800
From:	Randy Dunlap <rdunlap@...radead.org>
To:	"David E. Box" <david.e.box@...ux.intel.com>
CC:	mjg59@...f.ucam.org, rjw@...ysocki.net,
	linux-kernel@...r.kernel.org, platform-driver-x86@...r.kernel.org
Subject: Re: [PATCH v6][RESEND] platform: x86: New BayTrail IOSF-SB MBI driver

On 01/07/14 10:48, David E. Box wrote:
> On Tue, Jan 07, 2014 at 10:15:03AM -0800, Randy Dunlap wrote:
>> On 01/07/14 10:03, David E. Box wrote:
>>> From: "David E. Box" <david.e.box@...ux.intel.com>
>>>
>>> diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
>>> index b51a746..6e199a5 100644
>>> --- a/drivers/platform/x86/Kconfig
>>> +++ b/drivers/platform/x86/Kconfig
>>> @@ -819,4 +819,14 @@ config PVPANIC
>>>  	  a paravirtualized device provided by QEMU; it lets a virtual machine
>>>  	  (guest) communicate panic events to the host.
>>>  
>>> +config INTEL_BAYTRAIL_MBI
>>> +	tristate
>>
>> Is this kconfig option displayed when you run menuconfig/nconfig/xconfig/gconfig etc.?
>> Doesn't it need a prompt string?
>> How did you enable it and test it?
>>
> 
> It is not displayed on purpose. The driver isn't exposed to user space.
> It was tested by adding the option to .config, both as module and built-in.
> 
>>> +	depends on PCI
>>> +	---help---
>>> +	  Needed on Baytrail platforms for access to the IOSF Sideband Mailbox
>>> +	  Interface. This is a requirement for systems that need to configure
>>> +	  the PUNIT for power management features such as RAPL. Register
>>> +	  addresses and r/w opcodes are defined in
>>
>> Think of users reading this.  At least change "r/w" to read/write.
>> What is IOSF?  does it matter here?
>> PUNIT?  RAPL?
>>
> 
> If you don't know what the IOSF Sideband is you probably shouldn't be enabling
> this feature. Users of this driver (of which for now there are few) will be
> kernel space drivers that should have ample knowledge of the registers this
> interface provides access to.

I see.  Thanks.


-- 
~Randy
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