linux-kernel - Re: [PATCH v2 1/9] devicetree: bindings: Document Krait/Scorpion cpus and enable-method

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Message-ID: <20140108142139.GJ6701@e106331-lin.cambridge.arm.com>
Date:	Wed, 8 Jan 2014 14:21:40 +0000
From:	Mark Rutland <mark.rutland@....com>
To:	Stephen Boyd <sboyd@...eaurora.org>
Cc:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Rohit Vaswani <rvaswani@...eaurora.org>,
	David Brown <davidb@...eaurora.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
	Kumar Gala <galak@...eaurora.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Russell King <linux@....linux.org.uk>
Subject: Re: [PATCH v2 1/9] devicetree: bindings: Document Krait/Scorpion
 cpus and enable-method

On Tue, Dec 24, 2013 at 12:39:45AM +0000, Stephen Boyd wrote:
> From: Rohit Vaswani <rvaswani@...eaurora.org>
> 
> Scorpion and Krait don't use the spin-table enable-method.
> Instead they rely on mmio register accesses to enable power and
> clocks to bring CPUs out of reset. Document their enable-methods.
> 
> Cc: <devicetree@...r.kernel.org>
> Signed-off-by: Rohit Vaswani <rvaswani@...eaurora.org>
> [sboyd: Split off into separate patch, renamed methods to
> match compatible nodes]
> Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
> ---
>  Documentation/devicetree/bindings/arm/cpus.txt | 25 ++++++++++++++++++++++++-
>  1 file changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index 9130435..333f4ae 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -180,7 +180,11 @@ nodes to be present and contain the properties described below.
>  			  be one of:
>  			     "spin-table"
>  			     "psci"
> -			# On ARM 32-bit systems this property is optional.
> +			# On ARM 32-bit systems this property is optional and
> +			  can be one of:
> +			    "qcom,gcc-msm8660"
> +			    "qcom,kpss-acc-v1"
> +			    "qcom,kpss-acc-v2"

It would be nice to document "psci" here as valid for 32-bit.

Currently the PSCI code doesn't inspect the enable-method and assumes it
if there's a psci node, but KVM tool and others set enable-method to
"psci", and if we change the way the PSCI code probes it will require
enable-method to be set for PSCI to work.

>  
>  	- cpu-release-addr
>  		Usage: required for systems that have an "enable-method"
> @@ -191,6 +195,21 @@ nodes to be present and contain the properties described below.
>  			  property identifying a 64-bit zero-initialised
>  			  memory location.
>  
> +	- qcom,saw
> +		Usage: required for systems that have an "enable-method"
> +		       property value of "qcom,kpss-acc-v1" or
> +		       "qcom,kpss-acc-v2"
> +		Value type: <phandle>
> +		Definition: Specifies the SAW[1] node associated with this CPU.
> +
> +	- qcom,acc
> +		Usage: required for systems that have an "enable-method"
> +		       property value of "qcom,kpss-acc-v1" or
> +		       "qcom,kpss-acc-v2"
> +		Value type: <phandle>
> +		Definition: Specifies the ACC[2] node associated with this CPU.
> +
> +
>  Example 1 (dual-cluster big.LITTLE system 32-bit):

If this is going to get much longer, we should probably have
Documentation/devicetree/bindings/arm/boot/ or similar, but that can be
done later.

Otherwise, this looks fine to me.

Acked-by: Mark Rutland <mark.rutland@....com>

Thanks,
Mark.
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