linux-kernel - Re: [PATCH v2 2/9] devicetree: bindings: Document qcom,kpss-acc

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Message-ID: <52CDD90F.4040306@codeaurora.org>
Date:	Wed, 08 Jan 2014 15:02:39 -0800
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Mark Rutland <mark.rutland@....com>
CC:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	David Brown <davidb@...eaurora.org>,
	Rohit Vaswani <rvaswani@...eaurora.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
	Kumar Gala <galak@...eaurora.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Russell King <linux@....linux.org.uk>
Subject: Re: [PATCH v2 2/9] devicetree: bindings: Document qcom,kpss-acc

On 01/08/14 06:32, Mark Rutland wrote:
> On Wed, Jan 08, 2014 at 02:25:41PM +0000, Mark Rutland wrote:
>> On Tue, Dec 24, 2013 at 12:39:46AM +0000, Stephen Boyd wrote:
>>> The kpss acc binding describes the clock, reset, and power domain
>>> controller for a Krait CPU.
>>>
>>> Cc: <devicetree@...r.kernel.org>
>>> Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
>>> ---
>>>  .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt  | 30 ++++++++++++++++++++++
>>>  1 file changed, 30 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
>>> new file mode 100644
>>> index 0000000..1333db9
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
>>> @@ -0,0 +1,30 @@
>>> +Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
>>> +
>>> +The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
>>> +There is one ACC register region per CPU within the KPSS remapped region as
>>> +well as an alias register region that remaps accesses to the ACC associated
>>> +with the CPU accessing the region.
>> Is the mapping of ACC register to a specific processor well-defined? I
>> assume it's just in order of MPIDR.Aff0.
>>
>> To maintain our collective sanity in the face of possible future
>> implementations, do you have an idea as to whether this might need to be
>> extended in future for multiple clusters / reordered IDs and so on?
>>
>> I assume we'd just allocate a new compatible string if those get a
>> little crazy.
> Actually, I'm getting too hung-up on future-proofing. Assuming the
> mapping is well-defined for current implementations we can always add an
> additional property later if required.
>
> Acked-by: Mark Rutland <mark.rutland@....com>
>
>

Thanks Mark. As far as I know it will always be a one to one
relationship. I can't predict the future though so you're suggestion
seems like a good escape plan if needed.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

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